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PwmssSet Class Reference

Structure for PWMSS subsystem registers. More...

## Public Attributes

UInt32 | DeAd
| Device address.
UInt32 | ClAd
| Clock address.
UInt32 | ClVa
| Clock value (defaults to 2 = enabled, set to 0 = disabled).
UInt32 | IDVER
| IP Revision Register (see ARM Reference Guide, chapter 15.1.3.1 ).
UInt32 | SYSCONFIG
| System Configuration Register (see ARM Reference Guide, chapter 15.1.3.2 ).
UInt32 | CLKCONFIG
| Clock Configuration Register (see ARM Reference Guide, chapter 15.1.3.3 ).
UInt32 | CLKSTATUS
| Clock Status Register (see ARM Reference Guide, chapter 15.1.3.4 ).
UInt32 | TSCTR
| Time-Stamp Counter Register (see ARM Reference Guide, chapter 15.3.4.1.1 ).
UInt32 | CTRPHS
| Counter Phase Offset Value Register (see ARM Reference Guide, chapter 15.3.4.1.2 ).
UInt32 | CAP1
| Capture 1 Register (see ARM Reference Guide, chapter 15.3.4.1.3 ).
UInt32 | CAP2
| Capture 2 Register (see ARM Reference Guide, chapter 15.3.4.1.4 ).
UInt32 | CAP3
| Capture 3 Register (see ARM Reference Guide, chapter 15.3.4.1.5 ).
UInt32 | CAP4
| Capture 4 Register (see ARM Reference Guide, chapter 15.3.4.1.6 ).
UInt16 | ECCTL1
| Capture Control Register 1 (see ARM Reference Guide, chapter 15.3.4.1.7 ).
UInt16 | ECCTL2
| Capture Control Register 2 (see ARM Reference Guide, chapter 15.3.4.1.8 ).
UInt16 | ECEINT
| Capture Interrupt Enable Register (see ARM Reference Guide, chapter 15.3.4.1.9 ).
UInt16 | ECFLG
| Capture Interrupt Flag Register (see ARM Reference Guide, chapter 15.3.4.1.10 ).
UInt16 | ECCLR
| Capture Interrupt Clear Register (see ARM Reference Guide, chapter 15.3.4.1.11 ).
UInt16 | ECFRC
| Capture Interrupt Force Register (see ARM Reference Guide, chapter 15.3.4.1.12 ).
UInt32 | CAP_REV
| Revision ID Register (see ARM Reference Guide, chapter 15.3.4.1.13 ).
UInt32 | QPOSCNT
| Position Counter Register (see ARM Reference Guide, chapter 15.4.3.1 ).
UInt32 | QPOSINIT
| Position Counter Initialization Register (see ARM Reference Guide, chapter 15.4.3.2 ).
UInt32 | QPOSMAX
| Maximum Position Count Register (see ARM Reference Guide, chapter 15.4.3.3 ).
UInt32 | QPOSCMP
| Position-Compare Register 2/1 (see ARM Reference Guide, chapter 15.4.3.4 ).
UInt32 | QPOSILAT
| Index Position Latch Register (see ARM Reference Guide, chapter 15.4.3.5 ).
UInt32 | QPOSSLAT
| Strobe Position Latch Register (see ARM Reference Guide, chapter 15.4.3.6 ).
UInt32 | QPOSLAT
| Position Counter Latch Register (see ARM Reference Guide, chapter 15.4.3.7 ).
UInt32 | QUTMR
| Unit Timer Register (see ARM Reference Guide, chapter 15.4.3.8 ).
UInt32 | QUPRD
| Unit Period Register (see ARM Reference Guide, chapter 15.4.3.9 ).
UInt16 | QWDTMR
| Watchdog Timer Register (see ARM Reference Guide, chapter 15.4.3.10 ).
UInt16 | QWDPRD
| Watchdog Period Register (see ARM Reference Guide, chapter 15.4.3.11 ).
UInt16 | QDECCTL
| Decoder Control Register (see ARM Reference Guide, chapter 15.4.3.12 ).
UInt16 | QEPCTL
| Control Register (see ARM Reference Guide, chapter 15.4.3.14 ).
UInt16 | QCASCTL
| Capture Control Register (see ARM Reference Guide, chapter 15.4.3.15 ).
UInt16 | QPOSCTL
| Position-Compare Control Register (see ARM Reference Guide, chapter 15.4.3.15 ).
UInt16 | QEINT
| Interrupt Enable Register (see ARM Reference Guide, chapter 15.4.3.16 ).
UInt16 | QFLG
| Interrupt Flag Register (see ARM Reference Guide, chapter 15.4.3.17 ).
UInt16 | QCLR
| Interrupt Clear Register (see ARM Reference Guide, chapter 15.4.3.18 ).
UInt16 | QFRC
| Interrupt Force Register (see ARM Reference Guide, chapter 15.4.3.19 ).
UInt16 | QEPSTS
| Status Register (see ARM Reference Guide, chapter 15.4.3.20 ).
UInt16 | QCTMR
| Capture Timer Register (see ARM Reference Guide, chapter 15.4.3.21 ).
UInt16 | QCPRD
| Capture Period Register (see ARM Reference Guide, chapter 15.4.3.22 ).
UInt16 | QCTMRLAT
| Capture Timer Latch Register (see ARM Reference Guide, chapter 15.4.3.23 ).
UInt16 | QCPRDLAT
| Capture Period Latch Register (see ARM Reference Guide, chapter 15.4.3.24 ).
UInt16 | empty
| adjust at UInt32 border
UInt32 | QEP_REV
| Revision ID (see ARM Reference Guide, chapter 15.4.3.25 ).
UInt16 | TBCTL
| < Time-Base Submodule Registers (see ARM Reference Guide, chapter 15.2.4.1 ). More...
UInt16 | TBSTS
| Time-Base Status Register.
UInt16 | TBPHSHR
| Extension for HRPWM Phase Register.
UInt16 | TBPHS
| Time-Base Phase Register.
UInt16 | TBCNT
| Time-Base Counter Register.
UInt16 | TBPRD
| Time-Base Period Register.
UInt16 | CMPCTL
| Counter-Compare Control Register.
UInt16 | CMPAHR
| Extension for HRPWM Counter-Compare A Register.
UInt16 | CMPA
| Counter-Compare A Register.
UInt16 | CMPB
| Counter-Compare B Register.
UInt16 | AQCTLA
| Action-Qualifier Control Register for Output A (EPWMxA)
UInt16 | AQCTLB
| Action-Qualifier Control Register for Output B (EPWMxB)
UInt16 | AQSFRC
| Action-Qualifier Software Force Register.
UInt16 | AQCSFRC
| Action-Qualifier Continuous S/W Force Register Set.
UInt16 | DBCTL
| Dead-Band Generator Control Register.
UInt16 | DBRED
| Dead-Band Generator Rising Edge Delay Count Register.
UInt16 | DBFED
| Dead-Band Generator Falling Edge Delay Count Register.
UInt16 | TZSEL
| Trip-Zone Select Register.
UInt16 | TZCTL
| Trip-Zone Control Register.
UInt16 | TZEINT
| Trip-Zone Enable Interrupt Register.
UInt16 | TZFLG
| Trip-Zone Flag Register.
UInt16 | TZCLR
| Trip-Zone Clear Register.
UInt16 | TZFRC
| Trip-Zone Force Register.
UInt16 | ETSEL
| Event-Trigger Selection Register.
UInt16 | ETPS
| Event-Trigger Pre-Scale Register.
UInt16 | ETFLG
| Event-Trigger Flag Register.
UInt16 | ETCLR
| Event-Trigger Clear Register.
UInt16 | ETFRC
| Event-Trigger Force Register.
UInt16 | PCCTL
| PWM-Chopper Control Register.
UInt16 | HRCTL
| HRPWM Control Register.

## Detailed Description

Structure for PWMSS subsystem registers.

This UDT contains a set of all PWMSS subsystem registers. Is used to store the initial configuration of the three subsystems in the AM33xx CPU, and to hold their current configurations for the next call to function PruIo::config().

Each Pulse Width Modulation SubSystem (PWMSS) cpntains three modules: PWM, CAP and QEP. This structure holds the values for all registers of all modules, but the functions to control the modules are separated in the module UDTs PwmMod, CapMod and QepMod in order to make the API more clear.

Since
  0.2

Definition at line 32 of file pruio_pwmss.bi.

## Member Data Documentation

UInt16 PwmssSet::TBCTL

< Time-Base Submodule Registers (see ARM Reference Guide, chapter 15.2.4.1 ).

Time-Base Control Register

Definition at line 93 of file pruio_pwmss.bi.

The documentation for this class was generated from the following file:

- src/pruio/pruio_pwmss.bi