libpruio
0.2
Input/Output driver for digital/analog lines on Beagleboard hardware
All
Classes
Files
Functions
Variables
Typedefs
Enumerations
Enumerator
Macros
Pages
pruio_pwmss.bi
Go to the documentation of this file.
1
/'* \file pruio_pwmss.bi
2
\brief FreeBASIC header file for the PWMSS component declarations.
3
4
Header file for including the PWMSS component of libpruio. It contains
5
a UDT for the PWMSS subsystem, one for its registers and one UDT for
6
each module in the subsystem (eQEP, eCAP and ePWM) with the functions
7
to control the hardware.
8
9
The control functions are out-sourced in separate UDTs in order to make
10
the API easier to understand for the user. He wants a PWM output at pin
11
X or a CAP input at pin Y. And he should not care about the PWMSS
12
subsystems and its modules when doing simple tasks.
13
14
'/
15
16
17
/'* \brief Structure for PWMSS subsystem registers.
18
19
This UDT contains a set of all PWMSS subsystem registers. Is used to
20
store the initial configuration of the three subsystems in the AM33xx
21
CPU, and to hold their current configurations for the next call to
22
function PruIo::config().
23
24
Each Pulse Width Modulation SubSystem (PWMSS) cpntains three modules:
25
PWM, CAP and QEP. This structure holds the values for all registers of
26
all modules, but the functions to control the modules are separated in
27
the module UDTs PwmMod, CapMod and QepMod in order to
28
make the API more clear.
29
30
\since 0.2
31
'/
32
TYPE
PwmssSet
33
AS
UInt32
_
34
DeAd
_
'*< Device address.
35
,
ClAd
_
'*< Clock address.
36
,
ClVa
'*< Clock value (defaults to 2 = enabled, set to 0 = disabled).
37
38
AS
UInt32
_
'' PWMSS REGISTERS
39
IDVER
_
'*< IP Revision Register (see \ArmRef{15.1.3.1} ).
40
,
SYSCONFIG
_
'*< System Configuration Register (see \ArmRef{15.1.3.2} ).
41
,
CLKCONFIG
_
'*< Clock Configuration Register (see \ArmRef{15.1.3.3} ).
42
,
CLKSTATUS
'*< Clock Status Register (see \ArmRef{15.1.3.4} ).
43
44
AS
UInt32
_
'' eCAP registers (&h100)
45
TSCTR
_
'*< Time-Stamp Counter Register (see \ArmRef{15.3.4.1.1} ).
46
,
CTRPHS
_
'*< Counter Phase Offset Value Register (see \ArmRef{15.3.4.1.2} ).
47
,
CAP1
_
'*< Capture 1 Register (see \ArmRef{15.3.4.1.3} ).
48
,
CAP2
_
'*< Capture 2 Register (see \ArmRef{15.3.4.1.4} ).
49
,
CAP3
_
'*< Capture 3 Register (see \ArmRef{15.3.4.1.5} ).
50
,
CAP4
'*< Capture 4 Register (see \ArmRef{15.3.4.1.6} ).
51
AS
UInt16
_
52
ECCTL1
_
'*< Capture Control Register 1 (see \ArmRef{15.3.4.1.7} ).
53
,
ECCTL2
_
'*< Capture Control Register 2 (see \ArmRef{15.3.4.1.8} ).
54
,
ECEINT
_
'*< Capture Interrupt Enable Register (see \ArmRef{15.3.4.1.9} ).
55
,
ECFLG
_
'*< Capture Interrupt Flag Register (see \ArmRef{15.3.4.1.10} ).
56
,
ECCLR
_
'*< Capture Interrupt Clear Register (see \ArmRef{15.3.4.1.11} ).
57
,
ECFRC
'*< Capture Interrupt Force Register (see \ArmRef{15.3.4.1.12} ).
58
AS
UInt32
_
59
CAP_REV
'*< Revision ID Register (see \ArmRef{15.3.4.1.13} ).
60
61
AS
UInt32
_
'' QEP registers (&h180)
62
QPOSCNT
_
'*< Position Counter Register (see \ArmRef{15.4.3.1} ).
63
,
QPOSINIT
_
'*< Position Counter Initialization Register (see \ArmRef{15.4.3.2} ).
64
,
QPOSMAX
_
'*< Maximum Position Count Register (see \ArmRef{15.4.3.3} ).
65
,
QPOSCMP
_
'*< Position-Compare Register 2/1 (see \ArmRef{15.4.3.4} ).
66
,
QPOSILAT
_
'*< Index Position Latch Register (see \ArmRef{15.4.3.5} ).
67
,
QPOSSLAT
_
'*< Strobe Position Latch Register (see \ArmRef{15.4.3.6} ).
68
,
QPOSLAT
_
'*< Position Counter Latch Register (see \ArmRef{15.4.3.7} ).
69
,
QUTMR
_
'*< Unit Timer Register (see \ArmRef{15.4.3.8} ).
70
,
QUPRD
'*< Unit Period Register (see \ArmRef{15.4.3.9} ).
71
AS
UInt16
_
72
QWDTMR
_
'*< Watchdog Timer Register (see \ArmRef{15.4.3.10} ).
73
,
QWDPRD
_
'*< Watchdog Period Register (see \ArmRef{15.4.3.11} ).
74
,
QDECCTL
_
'*< Decoder Control Register (see \ArmRef{15.4.3.12} ).
75
,
QEPCTL
_
'*< Control Register (see \ArmRef{15.4.3.14} ).
76
,
QCASCTL
_
'*< Capture Control Register (see \ArmRef{15.4.3.15} ).
77
,
QPOSCTL
_
'*< Position-Compare Control Register (see \ArmRef{15.4.3.15} ).
78
,
QEINT
_
'*< Interrupt Enable Register (see \ArmRef{15.4.3.16} ).
79
,
QFLG
_
'*< Interrupt Flag Register (see \ArmRef{15.4.3.17} ).
80
,
QCLR
_
'*< Interrupt Clear Register (see \ArmRef{15.4.3.18} ).
81
,
QFRC
_
'*< Interrupt Force Register (see \ArmRef{15.4.3.19} ).
82
,
QEPSTS
_
'*< Status Register (see \ArmRef{15.4.3.20} ).
83
,
QCTMR
_
'*< Capture Timer Register (see \ArmRef{15.4.3.21} ).
84
,
QCPRD
_
'*< Capture Period Register (see \ArmRef{15.4.3.22} ).
85
,
QCTMRLAT
_
'*< Capture Timer Latch Register (see \ArmRef{15.4.3.23} ).
86
,
QCPRDLAT
_
'*< Capture Period Latch Register (see \ArmRef{15.4.3.24} ).
87
,
empty
'*< adjust at UInt32 border
88
AS
UInt32
_
89
QEP_REV
'*< Revision ID (see \ArmRef{15.4.3.25} ).
90
91
AS
UInt16
_
'' ePWM registers (&h200)
92
_
'*< Time-Base Submodule Registers (see \ArmRef{15.2.4.1} ).
93
TBCTL
_
'*< Time-Base Control Register
94
,
TBSTS
_
'*< Time-Base Status Register
95
,
TBPHSHR
_
'*< Extension for HRPWM Phase Register
96
,
TBPHS
_
'*< Time-Base Phase Register
97
,
TBCNT
_
'*< Time-Base Counter Register
98
,
TBPRD
_
'*< Time-Base Period Register
99
_
'' Counter-Compare Submodule Registers (see \ArmRef{15.2.4.2} ).
100
,
CMPCTL
_
'*< Counter-Compare Control Register
101
,
CMPAHR
_
'*< Extension for HRPWM Counter-Compare A Register
102
,
CMPA
_
'*< Counter-Compare A Register
103
,
CMPB
_
'*< Counter-Compare B Register
104
_
'' Action-Qualifier Submodule Registers (see \ArmRef{15.2.4.3} ).
105
,
AQCTLA
_
'*< Action-Qualifier Control Register for Output A (EPWMxA)
106
,
AQCTLB
_
'*< Action-Qualifier Control Register for Output B (EPWMxB)
107
,
AQSFRC
_
'*< Action-Qualifier Software Force Register
108
,
AQCSFRC
_
'*< Action-Qualifier Continuous S/W Force Register Set
109
_
'' Dead-Band Generator Submodule Registers (see \ArmRef{15.2.4.4} ).
110
,
DBCTL
_
'*< Dead-Band Generator Control Register
111
,
DBRED
_
'*< Dead-Band Generator Rising Edge Delay Count Register
112
,
DBFED
_
'*< Dead-Band Generator Falling Edge Delay Count Register
113
_
'' Trip-Zone Submodule Registers (see \ArmRef{15.2.4.5} ).
114
,
TZSEL
_
'*< Trip-Zone Select Register
115
,
TZCTL
_
'*< Trip-Zone Control Register
116
,
TZEINT
_
'*< Trip-Zone Enable Interrupt Register
117
,
TZFLG
_
'*< Trip-Zone Flag Register
118
,
TZCLR
_
'*< Trip-Zone Clear Register
119
,
TZFRC
_
'*< Trip-Zone Force Register
120
_
'' Event-Trigger Submodule Registers (see \ArmRef{15.2.4.6} ).
121
,
ETSEL
_
'*< Event-Trigger Selection Register
122
,
ETPS
_
'*< Event-Trigger Pre-Scale Register
123
,
ETFLG
_
'*< Event-Trigger Flag Register
124
,
ETCLR
_
'*< Event-Trigger Clear Register
125
,
ETFRC
_
'*< Event-Trigger Force Register
126
_
'' PWM-Chopper Submodule Registers (see \ArmRef{15.2.4.7} ).
127
,
PCCTL
_
'*< PWM-Chopper Control Register
128
_
'' High-Resolution PWM (HRPWM) Submodule Registers (see \ArmRef{15.2.4.8} ).
129
,
HRCTL
'*< HRPWM Control Register
130
END TYPE
131
132
133
/'* \brief UDT for PWMSS data, fetched in IO & RB mode.
134
135
This UDT is used to fetch the current register data from eCAP and eQEP
136
modules in IO and RB mode.
137
138
\since 0.2
139
'/
140
TYPE
PwmssArr
141
AS
UInt32
_
142
DeAd
'*< Subsystem address.
143
AS
UInt32
_
144
CMax
_
'*< Maximum counter value.
145
,
C1
_
'*< On time counter value.
146
,
C2
_
'*< Period time counter value.
147
,
fe1
_
'*< future expansion
148
,
fe2
_
'*< future expansion
149
,
fe3
_
'*< future expansion
150
,
fe4
'*< future expansion
151
END TYPE
152
153
154
/'* \brief Structure for PWMSS subsystem features, containing all
155
variables to handle the subsystems.
156
157
This UDT contains (only) the configuration of the three PWMSS
158
subsystems in the CPU. The functions to drive the hardware are in
159
separate UDTs, to make the API more easy to understand. See UDTs
160
PwmMod, CapMod and ŗef QepMod for details.
161
162
\since 0.2
163
'/
164
TYPE
PwmssUdt
165
AS
Pruio_
PTR
Top
'*< Pointer to the calling PruIo instance.
166
AS
PwmssSet
PTR
_
167
Init
(
PRUIO_AZ_PWMSS
) _
'*< Initial subsystem configuration, used in the destructor PruIo::~PruIo.
168
,
Conf
(
PRUIO_AZ_PWMSS
)
'*< Current subsystem configuration, used in PruIo::config().
169
AS
PwmssArr
PTR
_
170
Raw
(
PRUIO_AZ_PWMSS
)
'*< Pointer to current raw subsystem data (IO).
171
AS
UInt32
InitParA
'*< Initial parameters offset.
172
AS CONST
UInt16
_
173
PwmMode
= &b1011010000 _
'*< Value for ECCTL2 in PWM mode.
174
,
CapMode
= &b0011010110
'*< Value for ECCTL2 in CAP mode.
175
176
DECLARE CONSTRUCTOR
(
BYVAL AS
Pruio_
PTR
)
177
DECLARE FUNCTION
initialize
CDECL
()
AS ZSTRING PTR
178
END TYPE
179
180
181
/'* \brief UDT for PWM modules, containing the functions to drive the hardware.
182
183
Pulse width modulated (PWM) output can get generated in two ways. The
184
PWM subsystems (PWMSS) contain a ePWM module, which can generate two
185
PWM outputs at the same frequency (up to 17 bit resolution). And the
186
PWMSS contains a eCAP module, which can generate a single PWM output
187
(up to 32 bit resolution). All PWM generators (ePWM-1/2 and eCAP) are
188
controlled by the member functions of this structure (UDT). See
189
\ArmRef{15} for hardware details.
190
191
To use a header pins as PWM output, the pin must be in *pwm* mode
192
before starting your code. Then just set the desired period (frequency)
193
and duty cycle (load) by a call to function PwmMod::setValue().
194
195
'/
196
TYPE
PwmMod
197
AS
Pruio_
PTR
Top
'*< pointer to the calling PruIo instance
198
AS ZSTRING PTR
_
199
E0
= @
"pin has no PWM capability"
_
'*< common error message
200
,
E1
= @
"pin not in PWM mode"
_
'*< common error message
201
,
E2
= @
"PWMSS not enabled"
_
'*< common error message
202
,
E3
= @
"set frequency in first call"
_
'*< common error message
203
,
E4
= @
"frequency not supported"
'*< common error message
204
205
DECLARE CONSTRUCTOR
(
BYVAL AS
Pruio_
PTR
)
206
DECLARE FUNCTION
Value
CDECL
( _
207
BYVAL AS
UInt8 _
208
,
BYVAL AS
Float_t
PTR
= 0 _
209
,
BYVAL AS
Float_t
PTR
= 0)
AS ZSTRING PTR
210
DECLARE FUNCTION
setValue
CDECL
( _
211
BYVAL AS
UInt8, _
212
BYVAL AS
Float_t, _
213
BYVAL AS
Float_t)
AS ZSTRING PTR
214
DECLARE FUNCTION
pwm_set
CDECL
( _
215
BYVAL AS
UInt8 _
216
,
BYVAL AS
Float_t _
217
,
BYVAL AS
Float_t = 0. _
218
,
BYVAL AS
Float_t = 0.)
AS ZSTRING PTR
219
DECLARE FUNCTION
cap_set
CDECL
( _
220
BYVAL AS
UInt8 _
221
,
BYVAL AS
Float_t _
222
,
BYVAL AS
Float_t = 0.)
AS ZSTRING PTR
223
DECLARE FUNCTION
pwm_get
CDECL
( _
224
BYVAL AS
UInt8 _
225
,
BYVAL AS
Float_t
PTR
= 0 _
226
,
BYVAL AS
Float_t
PTR
= 0 _
227
,
BYVAL AS
UInt8)
AS ZSTRING PTR
228
DECLARE FUNCTION
cap_get
CDECL
( _
229
BYVAL AS
UInt8 _
230
,
BYVAL AS
Float_t
PTR
= 0 _
231
,
BYVAL AS
Float_t
PTR
= 0 )
AS ZSTRING PTR
232
END TYPE
233
234
235
/'* \brief UDT for PWMSS-CAP modules, containing the functions to drive the hardware.
236
237
This structure contains the functions to drive the hardware of the eCAP
238
modul in the PWMSS subsystems in input mode.
239
240
See \ArmRef{15.3} for hardware details.
241
242
'/
243
TYPE
CapMod
244
AS
Pruio_
PTR
Top
'*< pointer to the calling PruIo instance
245
AS ZSTRING PTR
_
246
E0
= @
"pin has no CAP capability"
_
'*< common error message
247
,
E1
= @
"pin not in CAP mode"
_
'*< common error message
248
,
E2
= @
"CAP not enabled"
'*< common error message
249
250
DECLARE CONSTRUCTOR
(
BYVAL AS
Pruio_
PTR
)
251
DECLARE FUNCTION
config
CDECL
( _
252
BYVAL AS
UInt8 _
253
,
BYVAL AS
Float_t = 0.)
AS ZSTRING PTR
254
DECLARE FUNCTION
Value
CDECL
( _
255
BYVAL AS
UInt8 _
256
,
BYVAL AS
Float_t
PTR
= 0 _
257
,
BYVAL AS
Float_t
PTR
= 0)
AS ZSTRING PTR
258
END TYPE
259
260
261
'/'* \brief UDT for PWMSS-QEP modules, containing the functions to drive the hardware.
262
263
'This structure contains the functions to drive the hardware of the eQEP
264
'modul in the PWMSS subsystems.
265
266
'See \ArmRef{15.4} for hardware details.
267
268
''/
269
'TYPE QepMod
270
'AS Pruio_ PTR Top '*< pointer to the calling PruIo instance
271
'AS ZSTRING PTR _
272
'E0 = @"pin has no QEP capability" _ '*< common error message
273
', E1 = @"pin not in QEP mode" _ '*< common error message
274
', E2 = @"QEP not enabled" '*< common error message
275
276
'DECLARE CONSTRUCTOR (BYVAL AS Pruio_ PTR)
277
'DECLARE FUNCTION config CDECL( _
278
'BYVAL AS UInt8 _
279
', BYVAL AS UInt8 = 0 _
280
', BYVAL AS UInt8 = 0 _
281
', BYVAL AS UInt8 = 0) AS ZSTRING PTR
282
'DECLARE FUNCTION Value CDECL( _
283
'BYVAL AS UInt8 _
284
', BYVAL AS Float_t PTR = 0) AS ZSTRING PTR
285
'END TYPE
286
src
pruio
pruio_pwmss.bi
Generated on Sun Oct 26 2014 16:53:02 for libpruio by
1.8.6