libpruio  0.2
Input/Output driver for digital/analog lines on Beagleboard hardware
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pruio.h
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1 
24 #ifdef __cplusplus
25  extern "C" {
26 #endif /* __cplusplus */
27 
28 #include "pruio.hp"
29 
30 //#include "../pruio/pruio.bi" (transformed)
32 #define PRUIO_VERSION "0.2"
33 
34 typedef signed char int8;
35 typedef short int16;
36 typedef int int32;
37 typedef unsigned char uint8;
38 typedef unsigned short uint16;
39 typedef unsigned int uint32;
40 typedef float float_t;
41 
43 #define AM33XX
44 
46 typedef struct pruIo pruIo;
47 
48 //#include "pruio_adc.h"
50 #define PRUIO_DEF_AVRAGE 4
51 #define PRUIO_DEF_ODELAY 183
53 #define PRUIO_DEF_SDELAY 0
55 #define PRUIO_DEF_SAMPLS 1
57 #define PRUIO_DEF_STPMSK 510 // &b111111110
59 #define PRUIO_DEF_TIMERV 0
61 #define PRUIO_DEF_LSLMOD 4
63 #define PRUIO_DEF_CLKDIV 0
65 
70 struct adcSteps{
71  uint32
73 Delay;
74 };
75 
80 typedef struct adcSet{
81  uint32
83 ClAd,
84 ClVa;
85 
86  uint32
88 SYSCONFIG,
90 IRQSTATUS,
93 IRQWAKEUP,
96 CTRL,
97 ADCSTAT,
98 ADCRANGE,
99 ADC_CLKDIV,
100 ADC_MISC,
101 STEPENABLE,
102 IDLECONFIG;
103 
105  struct adcSteps St_p[16 + 1];
106 
107  uint32
110 DMA0REQ,
111 FIFO1COUNT,
113 DMA1REQ;
114 } adcSet;
115 
120 typedef struct adcUdt{
122  adcSet
124 *Conf;
125  uint32
127 TimerVal,
128 InitParA;
129  uint16
131 ChAz;
132  uint16
134 } adcUdt;
135 
136 //#include "pruio_gpio.h"
141 typedef struct gpioSet{
142  uint32
144 ClAd,
145 ClVa;
146 
147  uint32
149 SYSCONFIG,
150 EOI,
153 IRQSTATUS_0,
154 IRQSTATUS_1,
159 IRQWAKEN_0,
160 IRQWAKEN_1,
161 SYSSTATUS,
162 CTRL,
163 OE,
164 DATAIN,
165 DATAOUT,
166 LEVELDETECT0,
167 LEVELDETECT1,
168 RISINGDETECT,
172 CLEARDATAOUT,
173 SETDATAOUT;
174 } gpioSet;
175 
180 typedef struct gpioArr{
181  uint32
183  uint32
185 DATAOUT,
186 Mix;
187 } gpioArr;
188 
189 
194 typedef struct gpioUdt{
196  gpioSet
198 *Conf[PRUIO_AZ_GPIO + 1];
199  gpioArr
201  uint32 InitParA;
202 } gpioUdt;
203 
204 
205 
206 
207 //#include "pruio_pwm.bi"
212 typedef struct pwmssSet{
213  uint32
215 ClAd,
216 ClVa;
217 
218  uint32
220 SYSCONFIG,
221 CLKCONFIG,
222 CLKSTATUS;
223 
224  uint32
226 CTRPHS,
227 CAP1,
228 CAP2,
229 CAP3,
230 CAP4;
231  uint16
233 ECCTL2,
234 ECEINT,
235 ECFLG,
236 ECCLR,
237 ECFRC;
238  uint32
240 
241  uint32
243 QPOSINIT,
244 QPOSMAX,
245 QPOSCMP,
246 QPOSILAT,
247 QPOSSLAT,
248 QPOSLAT,
249 QUTMR,
250 QUPRD;
251  uint16
253 QWDPRD,
254 QDECCTL,
255 QEPCTL,
256 QCASCTL,
257 QPOSCTL,
258 QEINT,
259 QFLG,
260 QCLR,
261 QFRC,
262 QEPSTS,
263 QCTMR,
264 QCPRD,
265 QCTMRLAT,
266 QCPRDLAT,
267 empty;
268  uint32
270 
271  uint16
273 TBSTS,
274 TBPHSHR,
275 TBPHS,
276 TBCNT,
277 TBPRD,
278 
279 CMPCTL,
280 CMPAHR,
281 CMPA,
282 CMPB,
283 
284 AQCTLA,
285 AQCTLB,
286 AQSFRC,
287 AQCSFRC,
288 
289 DBCTL,
290 DBRED,
291 DBFED,
292 
293 TZSEL,
294 TZCTL,
295 TZEINT,
296 TZFLG,
297 TZCLR,
298 TZFRC,
299 
300 ETSEL,
301 ETPS,
302 ETFLG,
303 ETCLR,
304 ETFRC,
305 
306 PCCTL,
307 
308 HRCTL;
309 } pwmssSet;
310 
311 
316 typedef struct pwmssArr{
317  uint32
319  uint32
321 C1,
322 C2,
323 fe1,
324 fe2,
325 fe3,
326 fe4;
327 } pwmssArr;
328 
329 
334 typedef struct pwmssUdt{
336  pwmssSet
338 *Conf[PRUIO_AZ_PWMSS + 1];
339  pwmssArr
341  uint32 InitParA;
342  const uint16
344 } pwmssUdt;
345 
346 
351 typedef struct pwmMod pwmMod;
352 
357 typedef struct capMod capMod;
358 
363 typedef struct qepMod qepMod;
364 
365 
367 #include "prussdrv.h"
369 #include "pruss_intc_mapping.h"
370 
377  PRUIO_ACT_ADC = 1 << 1 ,
378  PRUIO_ACT_GPIO0 = 1 << 2 ,
379  PRUIO_ACT_GPIO1 = 1 << 3 ,
380  PRUIO_ACT_GPIO2 = 1 << 4 ,
381  PRUIO_ACT_GPIO3 = 1 << 5 ,
382  PRUIO_ACT_PWM0 = 1 << 6 ,
383  PRUIO_ACT_PWM1 = 1 << 7 ,
384  PRUIO_ACT_PWM2 = 1 << 8 ,
386 };
387 
388 
393 typedef struct ballSet{
394  uint32
396  uint8 Value[PRUIO_AZ_BALL + 1];
397 } ballSet;
398 
403 typedef struct pruIo{
409  //qepMod* Qep;//!< pointer to the eQEP module structure (in PWMSS devices)
410 
411  char* Errr;
412  uint32* DRam;
413  ballSet
415 *Conf;
416  void
418 *DInit,
419 *DConf,
420 *MOffs;
421  uint8
423 *BallConf;
424  uint32
426 ESize,
427 DSize,
428 PruNo,
429 PruEvtOut,
430 PruIRam,
431 PruDRam;
432  int16
434 ParOffs,
435 DevAct;
436 
438  struct __pruss_intc_initdata IntcInit;
439 
442 } pruIo;
443 
444 
458 pruIo* pruio_new(uint16 Act, uint8 Av, uint32 OpD, uint8 SaD);
459 
465 void pruio_destroy(pruIo* Io);
466 
477 char* pruio_config(pruIo* Io, uint32 Samp, uint32 Mask, uint32 Tmr, uint16 Mds);
478 
486 char* pruio_Pin(pruIo* Io, uint8 Ball);
487 
498 char* pruio_mm_start(pruIo* Io, uint32 Trg1, uint32 Trg2, uint32 Trg3, uint32 Trg4);
499 
506 char* pruio_rb_start(pruIo* Io);
507 
508 
517 char* pruio_gpio_setValue(pruIo* Io, uint8 Ball, uint8 Modus);
518 
528 char* pruio_gpio_setValue(pruIo* Io, uint8 Ball, uint8 Modus);
529 
537 uint32 pruio_gpio_Value(pruIo* Io, uint8 Ball);
538 
539 
551 char* pruio_adc_setStep(pruIo* Io, uint8 Stp, uint8 ChN, uint8 Av, uint8 SaD, uint32 OpD);
552 
562 uint32 pruio_adc_mm_trg_pin(pruIo* Io, uint8 Ball, uint8 GpioV, uint16 Skip);
563 
564 
575 uint32 pruio_adc_mm_trg_ain(pruIo* Io, uint8 Stp, int32 AdcV, uint8 Rela, uint16 Skip);
576 
587 uint32 pruio_adc_mm_trg_pre(pruIo* Io, uint8 Stp, int32 AdcV, uint16 Samp, uint8 Rela);
588 
589 
598 char* pruio_cap_config(pruIo* Io, uint8 Ball, float_t FLow);
599 
609 char* pruio_cap_Value(pruIo* Io, uint8 Ball, float_t* Hz, float_t* Du);
610 
611 
621 char* pruio_pwm_Value(pruIo* Io, uint8 Ball, float_t* Hz, float_t* Du);
622 
632 char* pruio_pwm_setValue(pruIo* Io, uint8 Ball, float_t Hz, float_t Du);
633 
634 #ifdef __cplusplus
635  }
636 #endif /* __cplusplus */
char * pruio_pwm_setValue(pruIo *Io, uint8 Ball, float_t Hz, float_t Du)
Wrapper function for PwmMod::setValue().
uint32 IRQWAKEN_1
Register at offset 48h (chap. 25.4.1.13).
Definition: pruio.h:148
uint32 FIFO0COUNT
Register at offset E4h (chap. 12.5.1.51).
Definition: pruio.h:108
uint32 pruio_adc_mm_trg_pin(pruIo *Io, uint8 Ball, uint8 GpioV, uint16 Skip)
Wrapper function for AdcUdt::mm_trg_pin().
uint32 IRQSTATUS_CLR_0
Register at offset 3Ch (chap. 25.4.1.10).
Definition: pruio.h:148
unsigned char uint8
8 bit unsigned integer data type
Definition: pruio.h:37
uint32 QUTMR
Unit Timer Register (chap. 15.4.3.8).
Definition: pruio.h:242
uint32 QPOSILAT
Index Position Latch Register (chap. 15.4.3.5).
Definition: pruio.h:242
char * pruio_Pin(pruIo *Io, uint8 Ball)
Wrapper function for PruIo::get_config().
unsigned int uint32
32 bit unsigned integer data type
Definition: pruio.h:39
uint16 QFRC
Interrupt Force Register (chap. 15.4.3.19).
Definition: pruio.h:252
uint32 QEP_REV
Revision ID (chap. 15.4.3.25.
Definition: pruio.h:269
uint32 ClVa
clock value
Definition: pruio.h:143
uint32 TSCTR
Time-Stamp Counter Register (chap. 15.3.4.1.1).
Definition: pruio.h:225
struct gpioUdt gpioUdt
Wrapper structure for GpioUdt.
uint32 REVISION
Register at offset 00h (chap. 12.5.1.1).
Definition: pruio.h:87
uint32 IRQSTATUS_SET_0
Register at offset 34h (chap. 25.4.1.8).
Definition: pruio.h:148
uint32 DeAd
base address of Control Module device
Definition: pruio.h:395
uint32 DeAd
base address of GPIO device + 0x100
Definition: pruio.h:182
capMod * Cap
pointer to the eCAP module structure (in PWMSS devices)
Definition: pruio.h:408
uint32 ClVa
clock value
Definition: pruio.h:82
uint32 DMA0REQ
Register at offset ECh (chap. 12.5.1.53).
Definition: pruio.h:108
uint16 ETCLR
Event-Trigger Clear Register.
Definition: pruio.h:272
uint32 CAP3
Capture 3 Register (chap. 15.3.4.1.5).
Definition: pruio.h:225
Wrapper structure for PwmssSet.
Definition: pruio.h:212
uint16 QCASCTL
Capture Control Register (chap. 15.4.3.15).
Definition: pruio.h:252
ballSet * Init
The devices register data at start-up (to restore devices at the end)
Definition: pruio.h:414
gpioSet * Conf[PRUIO_AZ_GPIO+1]
current device configuration, used in PruIo::config()
Definition: pruio.h:197
uint32 fe2
???
Definition: pruio.h:320
int16 ParOffs
the offset for the parameters of a module
Definition: pruio.h:433
uint16 QCPRDLAT
Capture Period Latch Register (chap. 15.4.3.24).
Definition: pruio.h:252
gpioArr * Raw[PRUIO_AZ_GPIO+1]
pointer to current raw device data (IO), all 32 bits
Definition: pruio.h:200
uint32 FIFO1THRESHOLD
Register at offset F4h (chap. 12.5.1.55).
Definition: pruio.h:108
uint32 ADC_CLKDIV
Register at offset 4Ch (chap. 12.5.1.13).
Definition: pruio.h:87
uint32 pruio_adc_mm_trg_ain(pruIo *Io, uint8 Stp, int32 AdcV, uint8 Rela, uint16 Skip)
Wrapper function for AdcUdt::mm_trg_ain().
uint32 QUPRD
Unit Period Register (chap. 15.4.3.9).
Definition: pruio.h:242
uint32 IDLECONFIG
Register at offset 58h (chap. 12.5.1.16).
Definition: pruio.h:87
uint32 DSize
the size of a data block (DInit or DConf)
Definition: pruio.h:425
uint16 TZCTL
Trip-Zone Control Register.
Definition: pruio.h:272
uint32 DeAd
device address
Definition: pruio.h:214
activateDevice
the PRUSS driver library
Definition: pruio.h:375
pwmMod * Pwm
pointer to the ePWM module structure (in PWMSS devices)
Definition: pruio.h:407
int16 ArmPruInt
the interrupt to send
Definition: pruio.h:433
uint32 IRQSTATUS_CLR_1
Register at offset 40h (chap. 25.4.1.11).
Definition: pruio.h:148
pruIo * Top
pointer to the calling PruIo instance
Definition: pruio.h:121
uint16 LslMode
bit shift modus (0 to 4, for 12 to 16 bits)
Definition: pruio.h:130
uint16 AQSFRC
Action-Qualifier Software Force Register.
Definition: pruio.h:272
void * DConf
pointer to block of devices configuration data
Definition: pruio.h:417
uint32 DATAIN
current Value of DATAIN register (IO)
Definition: pruio.h:184
uint32 FALLINGDETECT
Register at offset 14Ch (chap. 25.4.1.22).
Definition: pruio.h:148
activate PRU-1 (= default, instead of PRU-0)
Definition: pruio.h:376
struct adcUdt adcUdt
Wrapper structure for AdcUdt.
pwmssUdt * PwmSS
pointer to PWMSS device structure
Definition: pruio.h:406
Wrapper structure for GpioArr.
Definition: pruio.h:180
Wrapper structure for AdcSet.
Definition: pruio.h:80
uint16 AQCTLA
Action-Qualifier Control Register for Output A (EPWMxA)
Definition: pruio.h:272
uint16 QEINT
Interrupt Enable Register (chap. 15.4.3.16).
Definition: pruio.h:252
uint16 TZFRC
Trip-Zone Force Register.
Definition: pruio.h:272
uint32 EAddr
the address of the external memory (PRUSS-DDR)
Definition: pruio.h:425
uint16 QFLG
Interrupt Flag Register (chap. 15.4.3.17).
Definition: pruio.h:252
uint16 ECCTL2
Capture Control Register 2 (chap. 15.3.4.1.8).
Definition: pruio.h:232
uint16 CMPAHR
Extension for HRPWM Counter-Compare A Register.
Definition: pruio.h:272
uint32 SYSSTATUS
Register at offset 114h (chap. 25.4.1.14).
Definition: pruio.h:148
char * pruio_rb_start(pruIo *Io)
Wrapper function for PruIo::rb_start().
uint16 QCLR
Interrupt Clear Register (chap. 15.4.3.18).
Definition: pruio.h:252
uint32 ADCSTAT
Register at offset 44h (chap. 12.5.1.11).
Definition: pruio.h:87
uint16 PCCTL
PWM-Chopper Control Register.
Definition: pruio.h:272
uint16 empty
adjust at uint32 border
Definition: pruio.h:252
struct adcSteps St_p[16+1]
step configuration (chap. 12.5.1.16 ff, charge step + 16 steps, by default steps 1 to 8 are used for ...
Definition: pruio.h:105
uint32 InitParA
offset to read data block offset
Definition: pruio.h:201
uint16 TBPRD
Time-Base Period Register.
Definition: pruio.h:272
uint32 CTRL
Register at offset 40h (chap. 12.5.1.10).
Definition: pruio.h:87
unsigned short uint16
16 bit unsigned integer data type
Definition: pruio.h:38
activate GPIO-2
Definition: pruio.h:380
char * pruio_adc_setStep(pruIo *Io, uint8 Stp, uint8 ChN, uint8 Av, uint8 SaD, uint32 OpD)
Wrapper function for AdcUdt::setStep().
uint32 Samples
number of samples (specifies run mode: 0 = config, 1 = IO mode, >1 = MM mode)
Definition: pruio.h:126
uint8 Value[PRUIO_AZ_BALL+1]
The values of the pad control registers.
Definition: pruio.h:396
char * pruio_mm_start(pruIo *Io, uint32 Trg1, uint32 Trg2, uint32 Trg3, uint32 Trg4)
Wrapper function for PruIo::mm_start().
uint32 ClAd
clock address
Definition: pruio.h:143
uint32 CLEARDATAOUT
Register at offset 190h (chap. 25.4.1.25).
Definition: pruio.h:148
uint16 QCTMRLAT
Capture Timer Latch Register (chap. 15.4.3.23).
Definition: pruio.h:252
uint32 DeAd
device address
Definition: pruio.h:82
uint16 DBCTL
Dead-Band Generator Control Register.
Definition: pruio.h:272
uint32 REVISION
Register at offset 00h (chap. 25.4.1.1).
Definition: pruio.h:148
struct __pruss_intc_initdata IntcInit
interrupt settings (we also set default interrupts, so that the other PRUSS can be used in parallel) ...
Definition: pruio.h:438
uint32 ESize
the size of the external memory (PRUSS-DDR)
Definition: pruio.h:425
uint32 SYSCONFIG
System Configuration Register (chap. 15.1.3.2).
Definition: pruio.h:219
struct gpioSet gpioSet
Wrapper structure for GpioSet.
uint32 EOI
Register at offset 20h (chap. 25.4.1.3).
Definition: pruio.h:148
uint32 DATAOUT
Register at offset 13Ch (chap. 25.4.1.18).
Definition: pruio.h:148
struct qepMod qepMod
Wrapper structure for QepMod.
Definition: pruio.h:363
pwmssArr * Raw[PRUIO_AZ_PWMSS+1]
pointer to current raw subsystem data (IO)
Definition: pruio.h:340
adcUdt * Adc
pointer to ADC device structure
Definition: pruio.h:404
uint32 IRQSTATUS_RAW_0
Register at offset 24h (chap. 25.4.1.4).
Definition: pruio.h:148
uint8 BallGpio[PRUIO_AZ_BALL+1]
list of GPIO numbers, corresponding to ball index
Definition: pruio.h:441
uint16 TZCLR
Trip-Zone Clear Register.
Definition: pruio.h:272
uint32 fe1
???
Definition: pruio.h:320
Wrapper structure for BallSet.
Definition: pruio.h:393
uint32 OE
Register at offset 134h (chap. 25.4.1.16).
Definition: pruio.h:148
void * ERam
pointer to read PRU external ram
Definition: pruio.h:417
uint32 CAP_REV
Revision ID Register (chap. 15.3.4.1.13).
Definition: pruio.h:239
uint32 CLKCONFIG
Clock Configuration Register (chap. 15.1.3.3).
Definition: pruio.h:219
uint32 fe3
???
Definition: pruio.h:320
uint32 SETDATAOUT
Register at offset 194h (chap. 25.4.1.26).
Definition: pruio.h:148
uint8 * BallOrg
pointer for original Ball configuration
Definition: pruio.h:422
uint16 QPOSCTL
Position-Compare Control Register (chap. 15.4.3.15).
Definition: pruio.h:252
uint32 CLKSTATUS
Clock Status Register (chap. 15.1.3.4).
Definition: pruio.h:219
uint32 DMA1REQ
Register at offset F8h (chap. 12.5.1.56).
Definition: pruio.h:108
This file synchronizes parameters between FreeBASIC, C and PASM source code.
uint16 TZSEL
Trip-Zone Select Register.
Definition: pruio.h:272
uint16 DBRED
Dead-Band Generator Rising Edge Delay Count Register.
Definition: pruio.h:272
uint8 * BallConf
pointer to ball configuration (CPU pin muxing)
Definition: pruio.h:422
struct pruIo pruIo
forward declaration
Definition: pruio.h:46
uint32 CTRL
Register at offset 130h (chap. 25.4.1.15).
Definition: pruio.h:148
uint32 IRQWAKEUP
Register at offset 34h (chap. 12.5.1.7).
Definition: pruio.h:87
uint32 C2
period time counter value
Definition: pruio.h:320
uint16 TZFLG
Trip-Zone Flag Register.
Definition: pruio.h:272
uint32 InitParA
offset to read data block offset
Definition: pruio.h:341
uint32 DATAOUT
current Value of DATAOUT register (IO)
Definition: pruio.h:184
void * DInit
pointer to block of devices initial data
Definition: pruio.h:417
activate ADC
Definition: pruio.h:377
uint32 IRQWAKEN_0
Register at offset 44h (chap. 25.4.1.12).
Definition: pruio.h:148
Wrapper structure for PruIo.
Definition: pruio.h:403
uint16 TBCNT
Time-Base Counter Register.
Definition: pruio.h:272
uint32 LEVELDETECT1
Register at offset 144h (chap. 25.4.1.20).
Definition: pruio.h:148
#define PRUIO_AZ_BALL
The number of CPU balls to handle (minus one).
Definition: pruio.hp:81
pruIo * pruio_new(uint16 Act, uint8 Av, uint32 OpD, uint8 SaD)
Wrapper function for the constructor PruIo::PruIo().
uint32 CMax
maximum counter value
Definition: pruio.h:320
uint32 DEBOUNCENABLE
Register at offset 150h (chap. 25.4.1.23).
Definition: pruio.h:148
char * Errr
pointer for error messages
Definition: pruio.h:411
uint32 pruio_adc_mm_trg_pre(pruIo *Io, uint8 Stp, int32 AdcV, uint16 Samp, uint8 Rela)
Wrapper function for AdcUdt::mm_trg_pre().
Wrapper structure for PwmssArr.
Definition: pruio.h:316
uint32 QPOSSLAT
Strobe Position Latch Register (chap. 15.4.3.6).
Definition: pruio.h:242
uint16 QWDTMR
Watchdog Timer Register (chap. 15.4.3.10).
Definition: pruio.h:252
void pruio_destroy(pruIo *Io)
Wrapper function for the destructor PruIo::~PruIo.
int int32
32 bit signed integer data type
Definition: pruio.h:36
activate PWMSS-2 (including eCAP, eQEP, ePWM)
Definition: pruio.h:384
uint16 QWDPRD
Watchdog Period Register (chap. 15.4.3.11).
Definition: pruio.h:252
uint32 * DRam
pointer to access PRU DRam
Definition: pruio.h:412
uint16 CMPA
Counter-Compare A Register.
Definition: pruio.h:272
uint32 ClAd
clock address
Definition: pruio.h:82
uint16 ETFRC
Event-Trigger Force Register.
Definition: pruio.h:272
uint16 AQCTLB
Action-Qualifier Control Register for Output B (EPWMxB)
Definition: pruio.h:272
activate GPIO-3
Definition: pruio.h:381
uint16 ECFRC
Capture Interrupt Force Register (chap. 15.3.4.1.12).
Definition: pruio.h:232
float float_t
float data type
Definition: pruio.h:40
struct gpioArr gpioArr
Wrapper structure for GpioArr.
uint16 QEPSTS
Status Register (chap. 15.4.3.20).
Definition: pruio.h:252
activate all devices
Definition: pruio.h:385
char * pruio_pwm_Value(pruIo *Io, uint8 Ball, float_t *Hz, float_t *Du)
Wrapper function for PwmMod::Value().
uint16 * Value
fetched ADC samples
Definition: pruio.h:133
uint32 RISINGDETECT
Register at offset 148h (chap. 25.4.1.21).
Definition: pruio.h:148
uint16 QCTMR
Capture Timer Register (chap. 15.4.3.21).
Definition: pruio.h:252
uint32 STEPENABLE
Register at offset 54h (chap. 12.5.1.15).
Definition: pruio.h:87
uint32 QPOSINIT
Position Counter Initialization Register (chap. 15.4.3.2).
Definition: pruio.h:242
const uint16 CapMod
value for ECCTL2 in CAP mode (&b11010110)
Definition: pruio.h:343
Wrapper structure for GpioUdt.
Definition: pruio.h:194
uint32 IDVER
IP Revision Register (chap. 15.1.3.1).
Definition: pruio.h:219
uint32 ADC_MISC
Register at offset 50h (chap. 12.5.1.14).
Definition: pruio.h:87
uint16 HRCTL
HRPWM Control Register.
Definition: pruio.h:272
uint32 IRQSTATUS_1
Register at offset 30h (chap. 25.4.1.7).
Definition: pruio.h:148
uint16 ChAz
the number of active steps
Definition: pruio.h:130
uint16 AQCSFRC
Action-Qualifier Continuous S/W Force Register Set.
Definition: pruio.h:272
uint32 InitParA
offset to read data block offset
Definition: pruio.h:126
Wrapper structure for PwmssUdt.
Definition: pruio.h:334
uint16 ECEINT
Capture Interrupt Enable Register (chap. 15.3.4.1.9).
Definition: pruio.h:232
uint16 QEPCTL
Control Register (chap. 15.4.3.14).
Definition: pruio.h:252
struct adcSet adcSet
Wrapper structure for AdcSet.
int16 DevAct
active devices
Definition: pruio.h:433
uint32 IRQSTATUS_0
Register at offset 2Ch (chap. 25.4.1.6).
Definition: pruio.h:148
adcSet * Conf
current device configuration, used in PruIo::config()
Definition: pruio.h:123
struct pwmMod pwmMod
Wrapper structure for PwmMod.
Definition: pruio.h:351
gpioSet * Init[PRUIO_AZ_GPIO+1]
initial device configuration, used in the destructor PruIo:~PruIo()
Definition: pruio.h:197
pruIo * Top
pointer to the calling PruIo instance
Definition: pruio.h:335
pruIo * Top
pointer to the calling PruIo instance
Definition: pruio.h:195
uint32 SYSCONFIG
Register at offset 10h (chap. 12.5.1.2).
Definition: pruio.h:87
char * pruio_gpio_setValue(pruIo *Io, uint8 Ball, uint8 Modus)
Wrapper function for GpioUdt::config().
uint16 ETPS
Event-Trigger Pre-Scale Register.
Definition: pruio.h:272
uint32 FIFO0THRESHOLD
Register at offset E8h (chap. 12.5.1.52).
Definition: pruio.h:108
uint32 pruio_gpio_Value(pruIo *Io, uint8 Ball)
Wrapper function for GpioUdt::Value().
uint32 Delay
context for delay register
Definition: pruio.h:72
uint16 TZEINT
Trip-Zone Enable Interrupt Register.
Definition: pruio.h:272
uint32 DeAd
device address
Definition: pruio.h:318
uint32 CTRPHS
Counter Phase Offset Value Register (chap. 15.3.4.1.2).
Definition: pruio.h:225
uint32 IRQSTATUS
Register at offset 28h (chap. 12.5.1.4).
Definition: pruio.h:87
uint16 ECCTL1
Capture Control Register 1 (chap. 15.3.4.1.7).
Definition: pruio.h:232
uint32 CAP2
Capture 2 Register (chap. 15.3.4.1.4).
Definition: pruio.h:225
activate PWMSS-1 (including eCAP, eQEP, ePWM)
Definition: pruio.h:383
uint32 QPOSCNT
Position Counter Register (chap. 15.4.3.1).
Definition: pruio.h:242
uint32 PruNo
the PRU number to use (defaults to 1)
Definition: pruio.h:425
uint32 SYSCONFIG
Register at offset 10h (chap. 25.4.1.2).
Definition: pruio.h:148
uint32 TimerVal
timer value in [ns]
Definition: pruio.h:126
uint32 IRQSTATUS_RAW_1
Register at offset 28h (chap. 25.4.1.5).
Definition: pruio.h:148
char * pruio_cap_Value(pruIo *Io, uint8 Ball, float_t *Hz, float_t *Du)
Wrapper function for CapMod::Value().
char * pruio_cap_config(pruIo *Io, uint8 Ball, float_t FLow)
Wrapper function for CapMod::config().
uint32 CAP4
Capture 4 Register (chap. 15.3.4.1.6).
Definition: pruio.h:225
Wrapper structure for GpioSet.
Definition: pruio.h:141
uint32 Mix
current state of pins (IN&OUT mixed)
Definition: pruio.h:184
uint16 ETFLG
Event-Trigger Flag Register.
Definition: pruio.h:272
uint16 TBPHS
Time-Base Phase Register.
Definition: pruio.h:272
uint16 TBSTS
Time-Base Status Register.
Definition: pruio.h:272
uint32 DEBOUNCINGTIME
Register at offset 154h (chap. 25.4.1.24).
Definition: pruio.h:148
uint32 ClAd
clock address
Definition: pruio.h:214
Wrapper structure for AdcSteps.
Definition: pruio.h:70
uint32 QPOSLAT
Position Counter Latch Register (chap. 15.4.3.7).
Definition: pruio.h:242
uint32 DMAENABLE_SET
Register at offset 38h (chap. 12.5.1.8).
Definition: pruio.h:87
uint16 CMPCTL
Counter-Compare Control Register.
Definition: pruio.h:272
uint32 IRQENABLE_SET
Register at offset 2Ch (chap. 12.5.1.5).
Definition: pruio.h:87
uint32 ADCRANGE
Register at offset 48h (chap. 12.5.1.12).
Definition: pruio.h:87
uint32 C1
on time counter value
Definition: pruio.h:320
struct ballSet ballSet
Wrapper structure for BallSet.
uint32 CAP1
Capture 1 Register (chap. 15.3.4.1.3).
Definition: pruio.h:225
uint32 PruEvtOut
the interrupt channel to send commands to PRU
Definition: pruio.h:425
uint32 LEVELDETECT0
Register at offset 140h (chap. 25.4.1.19).
Definition: pruio.h:148
uint32 DMAENABLE_CLR
Register at offset 3Ch (chap. 12.5.1.9).
Definition: pruio.h:87
uint32 QPOSMAX
Maximum Position Count Register (chap. 15.4.3.3).
Definition: pruio.h:242
uint32 IRQSTATUS_RAW
Register at offset 24h (chap. 12.5.1.3).
Definition: pruio.h:87
uint32 PruDRam
the PRU data ram
Definition: pruio.h:425
uint16 ECFLG
Capture Interrupt Flag Register (chap. 15.3.4.1.10).
Definition: pruio.h:232
uint16 CMPB
Counter-Compare B Register.
Definition: pruio.h:272
uint32 Confg
context for configuration register
Definition: pruio.h:72
uint16 ETSEL
Event-Trigger Selection Register.
Definition: pruio.h:272
uint16 TBCTL
Time-Base Control Register.
Definition: pruio.h:272
void * MOffs
configuration offset for modules
Definition: pruio.h:417
uint32 PruIRam
the PRU instruction ram to load
Definition: pruio.h:425
uint16 TBPHSHR
Extension for HRPWM Phase Register.
Definition: pruio.h:272
uint16 ECCLR
Capture Interrupt Clear Register (chap. 15.3.4.1.11).
Definition: pruio.h:232
uint32 fe4
???
Definition: pruio.h:320
gpioUdt * Gpio
pointer to GPIO device structure
Definition: pruio.h:405
uint32 DATAIN
Register at offset 138h (chap. 25.4.1.17).
Definition: pruio.h:148
uint32 IRQENABLE_CLR
Register at offset 30h (chap. 12.5.1.6).
Definition: pruio.h:87
Wrapper structure for AdcUdt.
Definition: pruio.h:120
struct capMod capMod
Wrapper structure for CapMod.
Definition: pruio.h:357
short int16
16 bit signed integer data type
Definition: pruio.h:35
uint32 DeAd
device address
Definition: pruio.h:143
uint16 QDECCTL
Decoder Control Register (chap. 15.4.3.12).
Definition: pruio.h:252
struct pwmssSet pwmssSet
Wrapper structure for PwmssSet.
adcSet * Init
initial device configuration, used in the destructor PruIo:~PruIo()
Definition: pruio.h:123
pwmssSet * Conf[PRUIO_AZ_PWMSS+1]
current device configuration, used in PruIo::config()
Definition: pruio.h:337
struct pwmssArr pwmssArr
Wrapper structure for PwmssArr.
#define PRUIO_AZ_PWMSS
The number of PWM subsystems (minus one).
Definition: pruio.hp:83
char * pruio_config(pruIo *Io, uint32 Samp, uint32 Mask, uint32 Tmr, uint16 Mds)
Wrapper function for PruIo::config().
signed char int8
8 bit signed integer data type
Definition: pruio.h:34
uint32 IRQSTATUS_SET_1
Register at offset 38h (chap. 25.4.1.9).
Definition: pruio.h:148
activate GPIO-1
Definition: pruio.h:379
activate GPIO-0
Definition: pruio.h:378
uint32 QPOSCMP
Position-Compare Register 2/1 (chap. 15.4.3.4).
Definition: pruio.h:242
#define PRUIO_AZ_GPIO
The number of GPIO subsystems (minus one).
Definition: pruio.hp:82
uint16 QCPRD
Capture Period Register (chap. 15.4.3.22).
Definition: pruio.h:252
struct pwmssUdt pwmssUdt
Wrapper structure for PwmssUdt.
uint32 ClVa
clock value
Definition: pruio.h:214
uint32 FIFO1COUNT
Register at offset F0h (chap. 12.5.1.54).
Definition: pruio.h:108
ballSet * Conf
The devices register data used by libpruio (current local data)
Definition: pruio.h:414
activate PWMSS-0 (including eCAP, eQEP, ePWM)
Definition: pruio.h:382
uint16 DBFED
Dead-Band Generator Falling Edge Delay Count Register.
Definition: pruio.h:272
pwmssSet * Init[PRUIO_AZ_PWMSS+1]
initial device configuration, used in the destructor PruIo:~PruIo()
Definition: pruio.h:337