32 #define PRUIO_VERSION "0.2"
50 #define PRUIO_DEF_AVRAGE 4
51 #define PRUIO_DEF_ODELAY 183
53 #define PRUIO_DEF_SDELAY 0
55 #define PRUIO_DEF_SAMPLS 1
57 #define PRUIO_DEF_STPMSK 510 // &b111111110
59 #define PRUIO_DEF_TIMERV 0
61 #define PRUIO_DEF_LSLMOD 4
63 #define PRUIO_DEF_CLKDIV 0
367 #include "prussdrv.h"
369 #include "pruss_intc_mapping.h"
char * pruio_pwm_setValue(pruIo *Io, uint8 Ball, float_t Hz, float_t Du)
Wrapper function for PwmMod::setValue().
uint32 IRQWAKEN_1
Register at offset 48h (chap. 25.4.1.13).
uint32 FIFO0COUNT
Register at offset E4h (chap. 12.5.1.51).
uint32 pruio_adc_mm_trg_pin(pruIo *Io, uint8 Ball, uint8 GpioV, uint16 Skip)
Wrapper function for AdcUdt::mm_trg_pin().
uint32 IRQSTATUS_CLR_0
Register at offset 3Ch (chap. 25.4.1.10).
unsigned char uint8
8 bit unsigned integer data type
uint32 QUTMR
Unit Timer Register (chap. 15.4.3.8).
uint32 QPOSILAT
Index Position Latch Register (chap. 15.4.3.5).
char * pruio_Pin(pruIo *Io, uint8 Ball)
Wrapper function for PruIo::get_config().
unsigned int uint32
32 bit unsigned integer data type
uint16 QFRC
Interrupt Force Register (chap. 15.4.3.19).
uint32 QEP_REV
Revision ID (chap. 15.4.3.25.
uint32 TSCTR
Time-Stamp Counter Register (chap. 15.3.4.1.1).
struct gpioUdt gpioUdt
Wrapper structure for GpioUdt.
uint32 REVISION
Register at offset 00h (chap. 12.5.1.1).
uint32 IRQSTATUS_SET_0
Register at offset 34h (chap. 25.4.1.8).
uint32 DeAd
base address of Control Module device
uint32 DeAd
base address of GPIO device + 0x100
capMod * Cap
pointer to the eCAP module structure (in PWMSS devices)
uint32 DMA0REQ
Register at offset ECh (chap. 12.5.1.53).
uint16 ETCLR
Event-Trigger Clear Register.
uint32 CAP3
Capture 3 Register (chap. 15.3.4.1.5).
Wrapper structure for PwmssSet.
uint16 QCASCTL
Capture Control Register (chap. 15.4.3.15).
ballSet * Init
The devices register data at start-up (to restore devices at the end)
gpioSet * Conf[PRUIO_AZ_GPIO+1]
current device configuration, used in PruIo::config()
int16 ParOffs
the offset for the parameters of a module
uint16 QCPRDLAT
Capture Period Latch Register (chap. 15.4.3.24).
gpioArr * Raw[PRUIO_AZ_GPIO+1]
pointer to current raw device data (IO), all 32 bits
uint32 FIFO1THRESHOLD
Register at offset F4h (chap. 12.5.1.55).
uint32 ADC_CLKDIV
Register at offset 4Ch (chap. 12.5.1.13).
uint32 pruio_adc_mm_trg_ain(pruIo *Io, uint8 Stp, int32 AdcV, uint8 Rela, uint16 Skip)
Wrapper function for AdcUdt::mm_trg_ain().
uint32 QUPRD
Unit Period Register (chap. 15.4.3.9).
uint32 IDLECONFIG
Register at offset 58h (chap. 12.5.1.16).
uint32 DSize
the size of a data block (DInit or DConf)
uint16 TZCTL
Trip-Zone Control Register.
uint32 DeAd
device address
activateDevice
the PRUSS driver library
pwmMod * Pwm
pointer to the ePWM module structure (in PWMSS devices)
int16 ArmPruInt
the interrupt to send
uint32 IRQSTATUS_CLR_1
Register at offset 40h (chap. 25.4.1.11).
pruIo * Top
pointer to the calling PruIo instance
uint16 LslMode
bit shift modus (0 to 4, for 12 to 16 bits)
uint16 AQSFRC
Action-Qualifier Software Force Register.
void * DConf
pointer to block of devices configuration data
uint32 DATAIN
current Value of DATAIN register (IO)
uint32 FALLINGDETECT
Register at offset 14Ch (chap. 25.4.1.22).
activate PRU-1 (= default, instead of PRU-0)
struct adcUdt adcUdt
Wrapper structure for AdcUdt.
pwmssUdt * PwmSS
pointer to PWMSS device structure
Wrapper structure for GpioArr.
Wrapper structure for AdcSet.
uint16 AQCTLA
Action-Qualifier Control Register for Output A (EPWMxA)
uint16 QEINT
Interrupt Enable Register (chap. 15.4.3.16).
uint16 TZFRC
Trip-Zone Force Register.
uint32 EAddr
the address of the external memory (PRUSS-DDR)
uint16 QFLG
Interrupt Flag Register (chap. 15.4.3.17).
uint16 ECCTL2
Capture Control Register 2 (chap. 15.3.4.1.8).
uint16 CMPAHR
Extension for HRPWM Counter-Compare A Register.
uint32 SYSSTATUS
Register at offset 114h (chap. 25.4.1.14).
char * pruio_rb_start(pruIo *Io)
Wrapper function for PruIo::rb_start().
uint16 QCLR
Interrupt Clear Register (chap. 15.4.3.18).
uint32 ADCSTAT
Register at offset 44h (chap. 12.5.1.11).
uint16 PCCTL
PWM-Chopper Control Register.
uint16 empty
adjust at uint32 border
struct adcSteps St_p[16+1]
step configuration (chap. 12.5.1.16 ff, charge step + 16 steps, by default steps 1 to 8 are used for ...
uint32 InitParA
offset to read data block offset
uint16 TBPRD
Time-Base Period Register.
uint32 CTRL
Register at offset 40h (chap. 12.5.1.10).
unsigned short uint16
16 bit unsigned integer data type
char * pruio_adc_setStep(pruIo *Io, uint8 Stp, uint8 ChN, uint8 Av, uint8 SaD, uint32 OpD)
Wrapper function for AdcUdt::setStep().
uint32 Samples
number of samples (specifies run mode: 0 = config, 1 = IO mode, >1 = MM mode)
uint8 Value[PRUIO_AZ_BALL+1]
The values of the pad control registers.
char * pruio_mm_start(pruIo *Io, uint32 Trg1, uint32 Trg2, uint32 Trg3, uint32 Trg4)
Wrapper function for PruIo::mm_start().
uint32 CLEARDATAOUT
Register at offset 190h (chap. 25.4.1.25).
uint16 QCTMRLAT
Capture Timer Latch Register (chap. 15.4.3.23).
uint32 DeAd
device address
uint16 DBCTL
Dead-Band Generator Control Register.
uint32 REVISION
Register at offset 00h (chap. 25.4.1.1).
struct __pruss_intc_initdata IntcInit
interrupt settings (we also set default interrupts, so that the other PRUSS can be used in parallel) ...
uint32 ESize
the size of the external memory (PRUSS-DDR)
uint32 SYSCONFIG
System Configuration Register (chap. 15.1.3.2).
struct gpioSet gpioSet
Wrapper structure for GpioSet.
uint32 EOI
Register at offset 20h (chap. 25.4.1.3).
uint32 DATAOUT
Register at offset 13Ch (chap. 25.4.1.18).
struct qepMod qepMod
Wrapper structure for QepMod.
pwmssArr * Raw[PRUIO_AZ_PWMSS+1]
pointer to current raw subsystem data (IO)
adcUdt * Adc
pointer to ADC device structure
uint32 IRQSTATUS_RAW_0
Register at offset 24h (chap. 25.4.1.4).
uint8 BallGpio[PRUIO_AZ_BALL+1]
list of GPIO numbers, corresponding to ball index
uint16 TZCLR
Trip-Zone Clear Register.
Wrapper structure for BallSet.
uint32 OE
Register at offset 134h (chap. 25.4.1.16).
void * ERam
pointer to read PRU external ram
uint32 CAP_REV
Revision ID Register (chap. 15.3.4.1.13).
uint32 CLKCONFIG
Clock Configuration Register (chap. 15.1.3.3).
uint32 SETDATAOUT
Register at offset 194h (chap. 25.4.1.26).
uint8 * BallOrg
pointer for original Ball configuration
uint16 QPOSCTL
Position-Compare Control Register (chap. 15.4.3.15).
uint32 CLKSTATUS
Clock Status Register (chap. 15.1.3.4).
uint32 DMA1REQ
Register at offset F8h (chap. 12.5.1.56).
This file synchronizes parameters between FreeBASIC, C and PASM source code.
uint16 TZSEL
Trip-Zone Select Register.
uint16 DBRED
Dead-Band Generator Rising Edge Delay Count Register.
uint8 * BallConf
pointer to ball configuration (CPU pin muxing)
struct pruIo pruIo
forward declaration
uint32 CTRL
Register at offset 130h (chap. 25.4.1.15).
uint32 IRQWAKEUP
Register at offset 34h (chap. 12.5.1.7).
uint32 C2
period time counter value
uint16 TZFLG
Trip-Zone Flag Register.
uint32 InitParA
offset to read data block offset
uint32 DATAOUT
current Value of DATAOUT register (IO)
void * DInit
pointer to block of devices initial data
uint32 IRQWAKEN_0
Register at offset 44h (chap. 25.4.1.12).
Wrapper structure for PruIo.
uint16 TBCNT
Time-Base Counter Register.
uint32 LEVELDETECT1
Register at offset 144h (chap. 25.4.1.20).
#define PRUIO_AZ_BALL
The number of CPU balls to handle (minus one).
pruIo * pruio_new(uint16 Act, uint8 Av, uint32 OpD, uint8 SaD)
Wrapper function for the constructor PruIo::PruIo().
uint32 CMax
maximum counter value
uint32 DEBOUNCENABLE
Register at offset 150h (chap. 25.4.1.23).
char * Errr
pointer for error messages
uint32 pruio_adc_mm_trg_pre(pruIo *Io, uint8 Stp, int32 AdcV, uint16 Samp, uint8 Rela)
Wrapper function for AdcUdt::mm_trg_pre().
Wrapper structure for PwmssArr.
uint32 QPOSSLAT
Strobe Position Latch Register (chap. 15.4.3.6).
uint16 QWDTMR
Watchdog Timer Register (chap. 15.4.3.10).
void pruio_destroy(pruIo *Io)
Wrapper function for the destructor PruIo::~PruIo.
int int32
32 bit signed integer data type
activate PWMSS-2 (including eCAP, eQEP, ePWM)
uint16 QWDPRD
Watchdog Period Register (chap. 15.4.3.11).
uint32 * DRam
pointer to access PRU DRam
uint16 CMPA
Counter-Compare A Register.
uint16 ETFRC
Event-Trigger Force Register.
uint16 AQCTLB
Action-Qualifier Control Register for Output B (EPWMxB)
uint16 ECFRC
Capture Interrupt Force Register (chap. 15.3.4.1.12).
float float_t
float data type
struct gpioArr gpioArr
Wrapper structure for GpioArr.
uint16 QEPSTS
Status Register (chap. 15.4.3.20).
char * pruio_pwm_Value(pruIo *Io, uint8 Ball, float_t *Hz, float_t *Du)
Wrapper function for PwmMod::Value().
uint16 * Value
fetched ADC samples
uint32 RISINGDETECT
Register at offset 148h (chap. 25.4.1.21).
uint16 QCTMR
Capture Timer Register (chap. 15.4.3.21).
uint32 STEPENABLE
Register at offset 54h (chap. 12.5.1.15).
uint32 QPOSINIT
Position Counter Initialization Register (chap. 15.4.3.2).
const uint16 CapMod
value for ECCTL2 in CAP mode (&b11010110)
Wrapper structure for GpioUdt.
uint32 IDVER
IP Revision Register (chap. 15.1.3.1).
uint32 ADC_MISC
Register at offset 50h (chap. 12.5.1.14).
uint16 HRCTL
HRPWM Control Register.
uint32 IRQSTATUS_1
Register at offset 30h (chap. 25.4.1.7).
uint16 ChAz
the number of active steps
uint16 AQCSFRC
Action-Qualifier Continuous S/W Force Register Set.
uint32 InitParA
offset to read data block offset
Wrapper structure for PwmssUdt.
uint16 ECEINT
Capture Interrupt Enable Register (chap. 15.3.4.1.9).
uint16 QEPCTL
Control Register (chap. 15.4.3.14).
struct adcSet adcSet
Wrapper structure for AdcSet.
int16 DevAct
active devices
uint32 IRQSTATUS_0
Register at offset 2Ch (chap. 25.4.1.6).
adcSet * Conf
current device configuration, used in PruIo::config()
struct pwmMod pwmMod
Wrapper structure for PwmMod.
gpioSet * Init[PRUIO_AZ_GPIO+1]
initial device configuration, used in the destructor PruIo:~PruIo()
pruIo * Top
pointer to the calling PruIo instance
pruIo * Top
pointer to the calling PruIo instance
uint32 SYSCONFIG
Register at offset 10h (chap. 12.5.1.2).
char * pruio_gpio_setValue(pruIo *Io, uint8 Ball, uint8 Modus)
Wrapper function for GpioUdt::config().
uint16 ETPS
Event-Trigger Pre-Scale Register.
uint32 FIFO0THRESHOLD
Register at offset E8h (chap. 12.5.1.52).
uint32 pruio_gpio_Value(pruIo *Io, uint8 Ball)
Wrapper function for GpioUdt::Value().
uint32 Delay
context for delay register
uint16 TZEINT
Trip-Zone Enable Interrupt Register.
uint32 DeAd
device address
uint32 CTRPHS
Counter Phase Offset Value Register (chap. 15.3.4.1.2).
uint32 IRQSTATUS
Register at offset 28h (chap. 12.5.1.4).
uint16 ECCTL1
Capture Control Register 1 (chap. 15.3.4.1.7).
uint32 CAP2
Capture 2 Register (chap. 15.3.4.1.4).
activate PWMSS-1 (including eCAP, eQEP, ePWM)
uint32 QPOSCNT
Position Counter Register (chap. 15.4.3.1).
uint32 PruNo
the PRU number to use (defaults to 1)
uint32 SYSCONFIG
Register at offset 10h (chap. 25.4.1.2).
uint32 TimerVal
timer value in [ns]
uint32 IRQSTATUS_RAW_1
Register at offset 28h (chap. 25.4.1.5).
char * pruio_cap_Value(pruIo *Io, uint8 Ball, float_t *Hz, float_t *Du)
Wrapper function for CapMod::Value().
char * pruio_cap_config(pruIo *Io, uint8 Ball, float_t FLow)
Wrapper function for CapMod::config().
uint32 CAP4
Capture 4 Register (chap. 15.3.4.1.6).
Wrapper structure for GpioSet.
uint32 Mix
current state of pins (IN&OUT mixed)
uint16 ETFLG
Event-Trigger Flag Register.
uint16 TBPHS
Time-Base Phase Register.
uint16 TBSTS
Time-Base Status Register.
uint32 DEBOUNCINGTIME
Register at offset 154h (chap. 25.4.1.24).
Wrapper structure for AdcSteps.
uint32 QPOSLAT
Position Counter Latch Register (chap. 15.4.3.7).
uint32 DMAENABLE_SET
Register at offset 38h (chap. 12.5.1.8).
uint16 CMPCTL
Counter-Compare Control Register.
uint32 IRQENABLE_SET
Register at offset 2Ch (chap. 12.5.1.5).
uint32 ADCRANGE
Register at offset 48h (chap. 12.5.1.12).
uint32 C1
on time counter value
struct ballSet ballSet
Wrapper structure for BallSet.
uint32 CAP1
Capture 1 Register (chap. 15.3.4.1.3).
uint32 PruEvtOut
the interrupt channel to send commands to PRU
uint32 LEVELDETECT0
Register at offset 140h (chap. 25.4.1.19).
uint32 DMAENABLE_CLR
Register at offset 3Ch (chap. 12.5.1.9).
uint32 QPOSMAX
Maximum Position Count Register (chap. 15.4.3.3).
uint32 IRQSTATUS_RAW
Register at offset 24h (chap. 12.5.1.3).
uint32 PruDRam
the PRU data ram
uint16 ECFLG
Capture Interrupt Flag Register (chap. 15.3.4.1.10).
uint16 CMPB
Counter-Compare B Register.
uint32 Confg
context for configuration register
uint16 ETSEL
Event-Trigger Selection Register.
uint16 TBCTL
Time-Base Control Register.
void * MOffs
configuration offset for modules
uint32 PruIRam
the PRU instruction ram to load
uint16 TBPHSHR
Extension for HRPWM Phase Register.
uint16 ECCLR
Capture Interrupt Clear Register (chap. 15.3.4.1.11).
gpioUdt * Gpio
pointer to GPIO device structure
uint32 DATAIN
Register at offset 138h (chap. 25.4.1.17).
uint32 IRQENABLE_CLR
Register at offset 30h (chap. 12.5.1.6).
Wrapper structure for AdcUdt.
struct capMod capMod
Wrapper structure for CapMod.
short int16
16 bit signed integer data type
uint32 DeAd
device address
uint16 QDECCTL
Decoder Control Register (chap. 15.4.3.12).
struct pwmssSet pwmssSet
Wrapper structure for PwmssSet.
adcSet * Init
initial device configuration, used in the destructor PruIo:~PruIo()
pwmssSet * Conf[PRUIO_AZ_PWMSS+1]
current device configuration, used in PruIo::config()
struct pwmssArr pwmssArr
Wrapper structure for PwmssArr.
#define PRUIO_AZ_PWMSS
The number of PWM subsystems (minus one).
char * pruio_config(pruIo *Io, uint32 Samp, uint32 Mask, uint32 Tmr, uint16 Mds)
Wrapper function for PruIo::config().
signed char int8
8 bit signed integer data type
uint32 IRQSTATUS_SET_1
Register at offset 38h (chap. 25.4.1.9).
uint32 QPOSCMP
Position-Compare Register 2/1 (chap. 15.4.3.4).
#define PRUIO_AZ_GPIO
The number of GPIO subsystems (minus one).
uint16 QCPRD
Capture Period Register (chap. 15.4.3.22).
struct pwmssUdt pwmssUdt
Wrapper structure for PwmssUdt.
uint32 FIFO1COUNT
Register at offset F0h (chap. 12.5.1.54).
ballSet * Conf
The devices register data used by libpruio (current local data)
activate PWMSS-0 (including eCAP, eQEP, ePWM)
uint16 DBFED
Dead-Band Generator Falling Edge Delay Count Register.
pwmssSet * Init[PRUIO_AZ_PWMSS+1]
initial device configuration, used in the destructor PruIo:~PruIo()