libpruio  0.2
Input/Output driver for digital/analog lines on Beagleboard hardware
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pruio_pins.bi
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1 /'* \file pruio_pins.bi
2 \brief Pre-defined macros to handle the beagle bone header pins.
3 
4 This file contains macros and arrays to easy handle the header pins and
5 pin groups of the beaglebone hardware. Instead of searching the CPU
6 ball number in lists, you can use one of these macros named after the
7 header and pin number (ie pin 3 of header P8 is named P8_03).
8 
9 The file also contains pre-defined arrays for the pin groups of the
10 beaglebone black hardware. The arrays include all CPU ball numbers that
11 belong to a subsystem like the EMMC2 or HDMI and can be used to adress
12 all related pins as one group.
13 
14 '/
15 
16 '* CPU ball number for pin 3 on header 8 (emmc2)
17 #define P8_03 6
18 '* CPU ball number for pin 4 on header 8 (emmc2)
19 #define P8_04 7
20 '* CPU ball number for pin 5 on header 8 (emmc2)
21 #define P8_05 2
22 '* CPU ball number for pin 6 on header 8 (emmc2)
23 #define P8_06 3
24 '* CPU ball number for pin 7 on header 8
25 #define P8_07 36
26 '* CPU ball number for pin 8 on header 8
27 #define P8_08 37
28 '* CPU ball number for pin 9 on header 8
29 #define P8_09 39
30 '* CPU ball number for pin 10 on header 8
31 #define P8_10 38
32 '* CPU ball number for pin 11 on header 8
33 #define P8_11 13
34 '* CPU ball number for pin 12 on header 8
35 #define P8_12 12
36 '* CPU ball number for pin 13 on header 8
37 #define P8_13 9
38 '* CPU ball number for pin 14 on header 8
39 #define P8_14 10
40 '* CPU ball number for pin 15 on header 8
41 #define P8_15 15
42 '* CPU ball number for pin 16 on header 8
43 #define P8_16 14
44 '* CPU ball number for pin 17 on header 8
45 #define P8_17 11
46 '* CPU ball number for pin 18 on header 8
47 #define P8_18 35
48 '* CPU ball number for pin 19 on header 8
49 #define P8_19 8
50 '* CPU ball number for pin 20 on header 8 (emmc2)
51 #define P8_20 33
52 '* CPU ball number for pin 21 on header 8 (emmc2)
53 #define P8_21 32
54 '* CPU ball number for pin 22 on header 8 (emmc2)
55 #define P8_22 5
56 '* CPU ball number for pin 23 on header 8 (emmc2)
57 #define P8_23 4
58 '* CPU ball number for pin 24 on header 8 (emmc2)
59 #define P8_24 1
60 '* CPU ball number for pin 25 on header 8 (emmc2)
61 #define P8_25 0
62 '* CPU ball number for pin 26 on header 8
63 #define P8_26 31
64 '* CPU ball number for pin 27 on header 8 (hdmi)
65 #define P8_27 56
66 '* CPU ball number for pin 28 on header 8 (hdmi)
67 #define P8_28 58
68 '* CPU ball number for pin 29 on header 8 (hdmi)
69 #define P8_29 57
70 '* CPU ball number for pin 30 on header 8 (hdmi)
71 #define P8_30 59
72 '* CPU ball number for pin 31 on header 8 (hdmi)
73 #define P8_31 54
74 '* CPU ball number for pin 32 on header 8 (hdmi)
75 #define P8_32 55
76 '* CPU ball number for pin 33 on header 8 (hdmi)
77 #define P8_33 53
78 '* CPU ball number for pin 34 on header 8 (hdmi)
79 #define P8_34 51
80 '* CPU ball number for pin 35 on header 8 (hdmi)
81 #define P8_35 52
82 '* CPU ball number for pin 36 on header 8 (hdmi)
83 #define P8_36 50
84 '* CPU ball number for pin 37 on header 8 (hdmi)
85 #define P8_37 48
86 '* CPU ball number for pin 38 on header 8 (hdmi)
87 #define P8_38 49
88 '* CPU ball number for pin 39 on header 8 (hdmi)
89 #define P8_39 46
90 '* CPU ball number for pin 40 on header 8 (hdmi)
91 #define P8_40 47
92 '* CPU ball number for pin 41 on header 8 (hdmi)
93 #define P8_41 44
94 '* CPU ball number for pin 42 on header 8 (hdmi)
95 #define P8_42 45
96 '* CPU ball number for pin 43 on header 8 (hdmi)
97 #define P8_43 42
98 '* CPU ball number for pin 44 on header 8 (hdmi)
99 #define P8_44 43
100 '* CPU ball number for pin 45 on header 8 (hdmi)
101 #define P8_45 40
102 '* CPU ball number for pin 46 on header 8 (hdmi)
103 #define P8_46 41
104 
105 '* CPU ball number for pin 11 on header 9
106 #define P9_11 28
107 '* CPU ball number for pin 12 on header 9
108 #define P9_12 30
109 '* CPU ball number for pin 13 on header 9
110 #define P9_13 29
111 '* CPU ball number for pin 14 on header 9
112 #define P9_14 18
113 '* CPU ball number for pin 15 on header 9
114 #define P9_15 16
115 '* CPU ball number for pin 16 on header 9
116 #define P9_16 19
117 '* CPU ball number for pin 17 on header 9
118 #define P9_17 87
119 '* CPU ball number for pin 18 on header 9
120 #define P9_18 86
121 '* CPU ball number for pin 19 on header 9 (i2c2)
122 #define P9_19 95
123 '* CPU ball number for pin 20 on header 9 (i2c2)
124 #define P9_20 94
125 '* CPU ball number for pin 21 on header 9
126 #define P9_21 85
127 '* CPU ball number for pin 22 on header 9
128 #define P9_22 84
129 '* CPU ball number for pin 23 on header 9
130 #define P9_23 17
131 '* CPU ball number for pin 24 on header 9
132 #define P9_24 97
133 '* CPU ball number for pin 25 on header 9 (mcasp0)
134 #define P9_25 107
135 '* CPU ball number for pin 26 on header 9
136 #define P9_26 96
137 '* CPU ball number for pin 27 on header 9
138 #define P9_27 105
139 '* CPU ball number for pin 28 on header 9 (mcasp0)
140 #define P9_28 103
141 '* CPU ball number for pin 29 on header 9 (mcasp0)
142 #define P9_29 101
143 '* CPU ball number for pin 30 on header 9
144 #define P9_30 102
145 '* CPU ball number for pin 31 on header 9 (mcasp0)
146 #define P9_31 100
147 '* CPU ball number for pin 41 on header 9
148 #define P9_41 109
149 '* CPU ball number for pin 42 on header 9
150 #define P9_42 89
151 
152 '* number of analog line on pin 39 on header 9
153 #define P9_39 AIN0
154 '* number of analog line on pin 40 on header 9
155 #define P9_40 AIN1
156 '* number of analog line on pin 37 on header 9
157 #define P9_37 AIN2
158 '* number of analog line on pin 38 on header 9
159 #define P9_38 AIN3
160 '* number of analog line on pin 33 on header 9
161 #define P9_33 AIN4
162 '* number of analog line on pin 36 on header 9
163 #define P9_36 AIN5
164 '* number of analog line on pin 35 on header 9
165 #define P9_35 AIN6
166 '* default step number of analog line AIN-0
167 #define AIN0 1
168 '* default step number of analog line AIN-1
169 #define AIN1 2
170 '* default step number of analog line AIN-2
171 #define AIN2 3
172 '* default step number of analog line AIN-3
173 #define AIN3 4
174 '* default step number of analog line AIN-4
175 #define AIN4 5
176 '* default step number of analog line AIN-5
177 #define AIN5 6
178 '* default step number of analog line AIN-6
179 #define AIN6 7
180 '* default step number of analog line AIN-7 (internal, no pin)
181 #define AIN7 8
182 
183 '* Array of CPU ball numbers for all pins on header P8.
184 DIM SHARED AS UInt8 P8_Pins(...) = { _
185  6 _
186 , 7 _
187 , 2 _
188 , 3 _
189 , 36 _
190 , 37 _
191 , 39 _
192 , 38 _
193 , 13 _
194 , 12 _
195 , 9 _
196 , 10 _
197 , 15 _
198 , 14 _
199 , 11 _
200 , 35 _
201 , 8 _
202 , 33 _
203 , 32 _
204 , 5 _
205 , 4 _
206 , 1 _
207 , 0 _
208 , 31 _
209 , 56 _
210 , 58 _
211 , 57 _
212 , 59 _
213 , 54 _
214 , 55 _
215 , 53 _
216 , 51 _
217 , 52 _
218 , 50 _
219 , 48 _
220 , 49 _
221 , 46 _
222 , 47 _
223 , 44 _
224 , 45 _
225 , 42 _
226 , 43 _
227 , 40 _
228 , 41 _
229  }
230 
231 '* Array of CPU ball numbers for all digital pins on header P9.
232 DIM SHARED AS UInt8 P9_Pins(...) = { _
233  28 _
234 , 30 _
235 , 29 _
236 , 18 _
237 , 16 _
238 , 19 _
239 , 87 _
240 , 86 _
241 , 95 _
242 , 94 _
243 , 85 _
244 , 84 _
245 , 17 _
246 , 97 _
247 , 107 _
248 , 96 _
249 , 105 _
250 , 103 _
251 , 101 _
252 , 102 _
253 , 100 _
254 , 109 _
255 , 89 _
256  }
257 
258 '* Array of CPU ball numbers for emmc2 pin group on header P8.
259 DIM SHARED AS UInt8 EMMC2_Pins(...) = { _
260  6 _
261 , 7 _
262 , 2 _
263 , 3 _
264 , 33 _
265 , 32 _
266 , 5 _
267 , 4 _
268 , 1 _
269 , 0 _
270  }
271 
272 '* Array of CPU ball numbers for hdmi pin group on header P8.
273 DIM SHARED AS UInt8 HDMI_Pins(...) = { _
274  56 _
275 , 58 _
276 , 57 _
277 , 59 _
278 , 54 _
279 , 55 _
280 , 53 _
281 , 51 _
282 , 52 _
283 , 50 _
284 , 48 _
285 , 49 _
286 , 46 _
287 , 47 _
288 , 44 _
289 , 45 _
290 , 42 _
291 , 43 _
292 , 40 _
293 , 41 _
294  }
295 
296 '* Array of CPU ball numbers for i2c1 pin group on header P9.
297 DIM SHARED AS UInt8 I2C1_Pins(...) = { _
298  87 _
299 , 86 _
300  }
301 
302 '* Array of CPU ball numbers for i2c2 pin group on header P9.
303 DIM SHARED AS UInt8 I2C2_Pins(...) = { _
304  95 _
305 , 94 _
306  }
307 
308 '* Array of CPU ball numbers for mcasp0 pin group on header P9.
309 DIM SHARED AS UInt8 MCASP0_Pins(...) = { _
310  107 _
311 , 103 _
312 , 101 _
313 , 100 _
314  }
315