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pruio.h
Go to the documentation of this file.
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#include "pruio.hp"
//#include "../pruio/pruio.bi" (transformed)
#define PRUIO_VERSION "0.2"
typedef signed char int8;
typedef short int16;
typedef int int32;
typedef unsigned char uint8;
typedef unsigned short uint16;
typedef unsigned int uint32;
typedef float float_t;
#define AM33XX
typedef struct pruIo pruIo;
//#include "pruio_adc.h"
#define PRUIO_DEF_AVRAGE 4
#define PRUIO_DEF_ODELAY 183
#define PRUIO_DEF_SDELAY 0
#define PRUIO_DEF_SAMPLS 1
#define PRUIO_DEF_STPMSK 510 // &b111111110
#define PRUIO_DEF_TIMERV 0
#define PRUIO_DEF_LSLMOD 4
#define PRUIO_DEF_CLKDIV 0
struct adcSteps{
uint32
Confg,
Delay;
};
typedef struct adcSet{
uint32
DeAd,
ClAd,
ClVa;
uint32
REVISION,
SYSCONFIG,
IRQSTATUS_RAW,
IRQSTATUS,
IRQENABLE_SET,
IRQENABLE_CLR,
IRQWAKEUP,
DMAENABLE_SET,
DMAENABLE_CLR,
CTRL,
ADCSTAT,
ADCRANGE,
ADC_CLKDIV,
ADC_MISC,
STEPENABLE,
IDLECONFIG;
struct adcSteps St_p[16 + 1];
uint32
FIFO0COUNT,
FIFO0THRESHOLD,
DMA0REQ,
FIFO1COUNT,
FIFO1THRESHOLD,
DMA1REQ;
} adcSet;
typedef struct adcUdt{
pruIo* Top;
adcSet
*Init,
*Conf;
uint32
Samples,
TimerVal,
InitParA;
uint16
LslMode,
ChAz;
uint16
*Value;
} adcUdt;
//#include "pruio_gpio.h"
typedef struct gpioSet{
uint32
DeAd,
ClAd,
ClVa;
uint32
REVISION,
SYSCONFIG,
EOI,
IRQSTATUS_RAW_0,
IRQSTATUS_RAW_1,
IRQSTATUS_0,
IRQSTATUS_1,
IRQSTATUS_SET_0,
IRQSTATUS_SET_1,
IRQSTATUS_CLR_0,
IRQSTATUS_CLR_1,
IRQWAKEN_0,
IRQWAKEN_1,
SYSSTATUS,
CTRL,
OE,
DATAIN,
DATAOUT,
LEVELDETECT0,
LEVELDETECT1,
RISINGDETECT,
FALLINGDETECT,
DEBOUNCENABLE,
DEBOUNCINGTIME,
CLEARDATAOUT,
SETDATAOUT;
} gpioSet;
typedef struct gpioArr{
uint32
DeAd;
uint32
DATAIN,
DATAOUT,
Mix;
} gpioArr;
typedef struct gpioUdt{
pruIo* Top;
gpioSet
*Init[PRUIO_AZ_GPIO + 1],
*Conf[PRUIO_AZ_GPIO + 1];
gpioArr
*Raw[PRUIO_AZ_GPIO + 1];
uint32 InitParA;
} gpioUdt;
//#include "pruio_pwm.bi"
typedef struct pwmssSet{
uint32
DeAd,
ClAd,
ClVa;
uint32
IDVER,
SYSCONFIG,
CLKCONFIG,
CLKSTATUS;
uint32
TSCTR,
CTRPHS,
CAP1,
CAP2,
CAP3,
CAP4;
uint16
ECCTL1,
ECCTL2,
ECEINT,
ECFLG,
ECCLR,
ECFRC;
uint32
CAP_REV;
uint32
QPOSCNT,
QPOSINIT,
QPOSMAX,
QPOSCMP,
QPOSILAT,
QPOSSLAT,
QPOSLAT,
QUTMR,
QUPRD;
uint16
QWDTMR,
QWDPRD,
QDECCTL,
QEPCTL,
QCASCTL,
QPOSCTL,
QEINT,
QFLG,
QCLR,
QFRC,
QEPSTS,
QCTMR,
QCPRD,
QCTMRLAT,
QCPRDLAT,
empty;
uint32
QEP_REV;
uint16
TBCTL,
TBSTS,
TBPHSHR,
TBPHS,
TBCNT,
TBPRD,
CMPCTL,
CMPAHR,
CMPA,
CMPB,
AQCTLA,
AQCTLB,
AQSFRC,
AQCSFRC,
DBCTL,
DBRED,
DBFED,
TZSEL,
TZCTL,
TZEINT,
TZFLG,
TZCLR,
TZFRC,
ETSEL,
ETPS,
ETFLG,
ETCLR,
ETFRC,
PCCTL,
HRCTL;
} pwmssSet;
typedef struct pwmssArr{
uint32
DeAd;
uint32
CMax,
C1,
C2,
fe1,
fe2,
fe3,
fe4;
} pwmssArr;
typedef struct pwmssUdt{
pruIo* Top;
pwmssSet
*Init[PRUIO_AZ_PWMSS + 1],
*Conf[PRUIO_AZ_PWMSS + 1];
pwmssArr
*Raw[PRUIO_AZ_PWMSS + 1];
uint32 InitParA;
const uint16
CapMod;
} pwmssUdt;
typedef struct pwmMod pwmMod;
typedef struct capMod capMod;
typedef struct qepMod qepMod;
#include "prussdrv.h"
#include "pruss_intc_mapping.h"
enum activateDevice{
PRUIO_ACT_PRU1 = 1 ,
PRUIO_ACT_ADC = 1 << 1 ,
PRUIO_ACT_GPIO0 = 1 << 2 ,
PRUIO_ACT_GPIO1 = 1 << 3 ,
PRUIO_ACT_GPIO2 = 1 << 4 ,
PRUIO_ACT_GPIO3 = 1 << 5 ,
PRUIO_ACT_PWM0 = 1 << 6 ,
PRUIO_ACT_PWM1 = 1 << 7 ,
PRUIO_ACT_PWM2 = 1 << 8 ,
PRUIO_DEF_ACTIVE = 0xFFFF
};
typedef struct ballSet{
uint32
DeAd;
uint8 Value[PRUIO_AZ_BALL + 1];
} ballSet;
typedef struct pruIo{
adcUdt* Adc;
gpioUdt* Gpio;
pwmssUdt* PwmSS;
pwmMod* Pwm;
capMod* Cap;
//qepMod* Qep;//!< pointer to the eQEP module structure (in PWMSS devices)
char* Errr;
uint32* DRam;
ballSet
*Init,
*Conf;
void
*ERam,
*DInit,
*DConf,
*MOffs;
uint8
*BallOrg,
*BallConf;
uint32
EAddr,
ESize,
DSize,
PruNo,
PruEvtOut,
PruIRam,
PruDRam;
int16
ArmPruInt,
ParOffs,
DevAct;
struct __pruss_intc_initdata IntcInit;
uint8 BallGpio[PRUIO_AZ_BALL + 1];
} pruIo;
pruIo* pruio_new(uint16 Act, uint8 Av, uint32 OpD, uint8 SaD);
void pruio_destroy(pruIo* Io);
char* pruio_config(pruIo* Io, uint32 Samp, uint32 Mask, uint32 Tmr, uint16 Mds);
char* pruio_Pin(pruIo* Io, uint8 Ball);
char* pruio_mm_start(pruIo* Io, uint32 Trg1, uint32 Trg2, uint32 Trg3, uint32 Trg4);
char* pruio_rb_start(pruIo* Io);
char* pruio_gpio_setValue(pruIo* Io, uint8 Ball, uint8 Modus);
char* pruio_gpio_setValue(pruIo* Io, uint8 Ball, uint8 Modus);
uint32 pruio_gpio_Value(pruIo* Io, uint8 Ball);
char* pruio_adc_setStep(pruIo* Io, uint8 Stp, uint8 ChN, uint8 Av, uint8 SaD, uint32 OpD);
uint32 pruio_adc_mm_trg_pin(pruIo* Io, uint8 Ball, uint8 GpioV, uint16 Skip);
uint32 pruio_adc_mm_trg_ain(pruIo* Io, uint8 Stp, int32 AdcV, uint8 Rela, uint16 Skip);
uint32 pruio_adc_mm_trg_pre(pruIo* Io, uint8 Stp, int32 AdcV, uint16 Samp, uint8 Rela);
char* pruio_cap_config(pruIo* Io, uint8 Ball, float_t FLow);
char* pruio_cap_Value(pruIo* Io, uint8 Ball, float_t* Hz, float_t* Du);
char* pruio_pwm_Value(pruIo* Io, uint8 Ball, float_t* Hz, float_t* Du);
char* pruio_pwm_setValue(pruIo* Io, uint8 Ball, float_t Hz, float_t Du);
#ifdef __cplusplus
}
#endif /* __cplusplus */
pruio_pwm_setValue
char * pruio_pwm_setValue(pruIo *Io, uint8 Ball, float_t Hz, float_t Du)
Wrapper function for PwmMod::setValue().
gpioSet::IRQWAKEN_1
uint32 IRQWAKEN_1
Register at offset 48h (chap. 25.4.1.13).
Definition: pruio.h:148
adcSet::FIFO0COUNT
uint32 FIFO0COUNT
Register at offset E4h (chap. 12.5.1.51).
Definition: pruio.h:108
pruio_adc_mm_trg_pin
uint32 pruio_adc_mm_trg_pin(pruIo *Io, uint8 Ball, uint8 GpioV, uint16 Skip)
Wrapper function for AdcUdt::mm_trg_pin().
gpioSet::IRQSTATUS_CLR_0
uint32 IRQSTATUS_CLR_0
Register at offset 3Ch (chap. 25.4.1.10).
Definition: pruio.h:148
uint8
unsigned char uint8
8 bit unsigned integer data type
Definition: pruio.h:37
pwmssSet::QUTMR
uint32 QUTMR
Unit Timer Register (chap. 15.4.3.8).
Definition: pruio.h:242
pwmssSet::QPOSILAT
uint32 QPOSILAT
Index Position Latch Register (chap. 15.4.3.5).
Definition: pruio.h:242
pruio_Pin
char * pruio_Pin(pruIo *Io, uint8 Ball)
Wrapper function for PruIo::get_config().
uint32
unsigned int uint32
32 bit unsigned integer data type
Definition: pruio.h:39
pwmssSet::QFRC
uint16 QFRC
Interrupt Force Register (chap. 15.4.3.19).
Definition: pruio.h:252
pwmssSet::QEP_REV
uint32 QEP_REV
Revision ID (chap. 15.4.3.25.
Definition: pruio.h:269
gpioSet::ClVa
uint32 ClVa
clock value
Definition: pruio.h:143
pwmssSet::TSCTR
uint32 TSCTR
Time-Stamp Counter Register (chap. 15.3.4.1.1).
Definition: pruio.h:225
gpioUdt
struct gpioUdt gpioUdt
Wrapper structure for GpioUdt.
adcSet::REVISION
uint32 REVISION
Register at offset 00h (chap. 12.5.1.1).
Definition: pruio.h:87
gpioSet::IRQSTATUS_SET_0
uint32 IRQSTATUS_SET_0
Register at offset 34h (chap. 25.4.1.8).
Definition: pruio.h:148
ballSet::DeAd
uint32 DeAd
base address of Control Module device
Definition: pruio.h:395
gpioArr::DeAd
uint32 DeAd
base address of GPIO device + 0x100
Definition: pruio.h:182
pruIo::Cap
capMod * Cap
pointer to the eCAP module structure (in PWMSS devices)
Definition: pruio.h:408
adcSet::ClVa
uint32 ClVa
clock value
Definition: pruio.h:82
adcSet::DMA0REQ
uint32 DMA0REQ
Register at offset ECh (chap. 12.5.1.53).
Definition: pruio.h:108
pwmssSet::ETCLR
uint16 ETCLR
Event-Trigger Clear Register.
Definition: pruio.h:272
pwmssSet::CAP3
uint32 CAP3
Capture 3 Register (chap. 15.3.4.1.5).
Definition: pruio.h:225
pwmssSet
Wrapper structure for PwmssSet.
Definition: pruio.h:212
pwmssSet::QCASCTL
uint16 QCASCTL
Capture Control Register (chap. 15.4.3.15).
Definition: pruio.h:252
pruIo::Init
ballSet * Init
The devices register data at start-up (to restore devices at the end)
Definition: pruio.h:414
gpioUdt::Conf
gpioSet * Conf[PRUIO_AZ_GPIO+1]
current device configuration, used in PruIo::config()
Definition: pruio.h:197
pwmssArr::fe2
uint32 fe2
???
Definition: pruio.h:320
pruIo::ParOffs
int16 ParOffs
the offset for the parameters of a module
Definition: pruio.h:433
pwmssSet::QCPRDLAT
uint16 QCPRDLAT
Capture Period Latch Register (chap. 15.4.3.24).
Definition: pruio.h:252
gpioUdt::Raw
gpioArr * Raw[PRUIO_AZ_GPIO+1]
pointer to current raw device data (IO), all 32 bits
Definition: pruio.h:200
adcSet::FIFO1THRESHOLD
uint32 FIFO1THRESHOLD
Register at offset F4h (chap. 12.5.1.55).
Definition: pruio.h:108
adcSet::ADC_CLKDIV
uint32 ADC_CLKDIV
Register at offset 4Ch (chap. 12.5.1.13).
Definition: pruio.h:87
pruio_adc_mm_trg_ain
uint32 pruio_adc_mm_trg_ain(pruIo *Io, uint8 Stp, int32 AdcV, uint8 Rela, uint16 Skip)
Wrapper function for AdcUdt::mm_trg_ain().
pwmssSet::QUPRD
uint32 QUPRD
Unit Period Register (chap. 15.4.3.9).
Definition: pruio.h:242
adcSet::IDLECONFIG
uint32 IDLECONFIG
Register at offset 58h (chap. 12.5.1.16).
Definition: pruio.h:87
pruIo::DSize
uint32 DSize
the size of a data block (DInit or DConf)
Definition: pruio.h:425
pwmssSet::TZCTL
uint16 TZCTL
Trip-Zone Control Register.
Definition: pruio.h:272
pwmssSet::DeAd
uint32 DeAd
device address
Definition: pruio.h:214
activateDevice
activateDevice
the PRUSS driver library
Definition: pruio.h:375
pruIo::Pwm
pwmMod * Pwm
pointer to the ePWM module structure (in PWMSS devices)
Definition: pruio.h:407
pruIo::ArmPruInt
int16 ArmPruInt
the interrupt to send
Definition: pruio.h:433
gpioSet::IRQSTATUS_CLR_1
uint32 IRQSTATUS_CLR_1
Register at offset 40h (chap. 25.4.1.11).
Definition: pruio.h:148
adcUdt::Top
pruIo * Top
pointer to the calling PruIo instance
Definition: pruio.h:121
adcUdt::LslMode
uint16 LslMode
bit shift modus (0 to 4, for 12 to 16 bits)
Definition: pruio.h:130
pwmssSet::AQSFRC
uint16 AQSFRC
Action-Qualifier Software Force Register.
Definition: pruio.h:272
pruIo::DConf
void * DConf
pointer to block of devices configuration data
Definition: pruio.h:417
gpioArr::DATAIN
uint32 DATAIN
current Value of DATAIN register (IO)
Definition: pruio.h:184
gpioSet::FALLINGDETECT
uint32 FALLINGDETECT
Register at offset 14Ch (chap. 25.4.1.22).
Definition: pruio.h:148
PRUIO_ACT_PRU1
activate PRU-1 (= default, instead of PRU-0)
Definition: pruio.h:376
adcUdt
struct adcUdt adcUdt
Wrapper structure for AdcUdt.
pruIo::PwmSS
pwmssUdt * PwmSS
pointer to PWMSS device structure
Definition: pruio.h:406
gpioArr
Wrapper structure for GpioArr.
Definition: pruio.h:180
adcSet
Wrapper structure for AdcSet.
Definition: pruio.h:80
pwmssSet::AQCTLA
uint16 AQCTLA
Action-Qualifier Control Register for Output A (EPWMxA)
Definition: pruio.h:272
pwmssSet::QEINT
uint16 QEINT
Interrupt Enable Register (chap. 15.4.3.16).
Definition: pruio.h:252
pwmssSet::TZFRC
uint16 TZFRC
Trip-Zone Force Register.
Definition: pruio.h:272
pruIo::EAddr
uint32 EAddr
the address of the external memory (PRUSS-DDR)
Definition: pruio.h:425
pwmssSet::QFLG
uint16 QFLG
Interrupt Flag Register (chap. 15.4.3.17).
Definition: pruio.h:252
pwmssSet::ECCTL2
uint16 ECCTL2
Capture Control Register 2 (chap. 15.3.4.1.8).
Definition: pruio.h:232
pwmssSet::CMPAHR
uint16 CMPAHR
Extension for HRPWM Counter-Compare A Register.
Definition: pruio.h:272
gpioSet::SYSSTATUS
uint32 SYSSTATUS
Register at offset 114h (chap. 25.4.1.14).
Definition: pruio.h:148
pruio_rb_start
char * pruio_rb_start(pruIo *Io)
Wrapper function for PruIo::rb_start().
pwmssSet::QCLR
uint16 QCLR
Interrupt Clear Register (chap. 15.4.3.18).
Definition: pruio.h:252
adcSet::ADCSTAT
uint32 ADCSTAT
Register at offset 44h (chap. 12.5.1.11).
Definition: pruio.h:87
pwmssSet::PCCTL
uint16 PCCTL
PWM-Chopper Control Register.
Definition: pruio.h:272
pwmssSet::empty
uint16 empty
adjust at uint32 border
Definition: pruio.h:252
adcSet::St_p
struct adcSteps St_p[16+1]
step configuration (chap. 12.5.1.16 ff, charge step + 16 steps, by default steps 1 to 8 are used for ...
Definition: pruio.h:105
gpioUdt::InitParA
uint32 InitParA
offset to read data block offset
Definition: pruio.h:201
pwmssSet::TBPRD
uint16 TBPRD
Time-Base Period Register.
Definition: pruio.h:272
adcSet::CTRL
uint32 CTRL
Register at offset 40h (chap. 12.5.1.10).
Definition: pruio.h:87
uint16
unsigned short uint16
16 bit unsigned integer data type
Definition: pruio.h:38
PRUIO_ACT_GPIO2
activate GPIO-2
Definition: pruio.h:380
pruio_adc_setStep
char * pruio_adc_setStep(pruIo *Io, uint8 Stp, uint8 ChN, uint8 Av, uint8 SaD, uint32 OpD)
Wrapper function for AdcUdt::setStep().
adcUdt::Samples
uint32 Samples
number of samples (specifies run mode: 0 = config, 1 = IO mode, >1 = MM mode)
Definition: pruio.h:126
ballSet::Value
uint8 Value[PRUIO_AZ_BALL+1]
The values of the pad control registers.
Definition: pruio.h:396
pruio_mm_start
char * pruio_mm_start(pruIo *Io, uint32 Trg1, uint32 Trg2, uint32 Trg3, uint32 Trg4)
Wrapper function for PruIo::mm_start().
gpioSet::ClAd
uint32 ClAd
clock address
Definition: pruio.h:143
gpioSet::CLEARDATAOUT
uint32 CLEARDATAOUT
Register at offset 190h (chap. 25.4.1.25).
Definition: pruio.h:148
pwmssSet::QCTMRLAT
uint16 QCTMRLAT
Capture Timer Latch Register (chap. 15.4.3.23).
Definition: pruio.h:252
adcSet::DeAd
uint32 DeAd
device address
Definition: pruio.h:82
pwmssSet::DBCTL
uint16 DBCTL
Dead-Band Generator Control Register.
Definition: pruio.h:272
gpioSet::REVISION
uint32 REVISION
Register at offset 00h (chap. 25.4.1.1).
Definition: pruio.h:148
pruIo::IntcInit
struct __pruss_intc_initdata IntcInit
interrupt settings (we also set default interrupts, so that the other PRUSS can be used in parallel) ...
Definition: pruio.h:438
pruIo::ESize
uint32 ESize
the size of the external memory (PRUSS-DDR)
Definition: pruio.h:425
pwmssSet::SYSCONFIG
uint32 SYSCONFIG
System Configuration Register (chap. 15.1.3.2).
Definition: pruio.h:219
gpioSet
struct gpioSet gpioSet
Wrapper structure for GpioSet.
gpioSet::EOI
uint32 EOI
Register at offset 20h (chap. 25.4.1.3).
Definition: pruio.h:148
gpioSet::DATAOUT
uint32 DATAOUT
Register at offset 13Ch (chap. 25.4.1.18).
Definition: pruio.h:148
qepMod
struct qepMod qepMod
Wrapper structure for QepMod.
Definition: pruio.h:363
pwmssUdt::Raw
pwmssArr * Raw[PRUIO_AZ_PWMSS+1]
pointer to current raw subsystem data (IO)
Definition: pruio.h:340
pruIo::Adc
adcUdt * Adc
pointer to ADC device structure
Definition: pruio.h:404
gpioSet::IRQSTATUS_RAW_0
uint32 IRQSTATUS_RAW_0
Register at offset 24h (chap. 25.4.1.4).
Definition: pruio.h:148
pruIo::BallGpio
uint8 BallGpio[PRUIO_AZ_BALL+1]
list of GPIO numbers, corresponding to ball index
Definition: pruio.h:441
pwmssSet::TZCLR
uint16 TZCLR
Trip-Zone Clear Register.
Definition: pruio.h:272
pwmssArr::fe1
uint32 fe1
???
Definition: pruio.h:320
ballSet
Wrapper structure for BallSet.
Definition: pruio.h:393
gpioSet::OE
uint32 OE
Register at offset 134h (chap. 25.4.1.16).
Definition: pruio.h:148
pruIo::ERam
void * ERam
pointer to read PRU external ram
Definition: pruio.h:417
pwmssSet::CAP_REV
uint32 CAP_REV
Revision ID Register (chap. 15.3.4.1.13).
Definition: pruio.h:239
pwmssSet::CLKCONFIG
uint32 CLKCONFIG
Clock Configuration Register (chap. 15.1.3.3).
Definition: pruio.h:219
pwmssArr::fe3
uint32 fe3
???
Definition: pruio.h:320
gpioSet::SETDATAOUT
uint32 SETDATAOUT
Register at offset 194h (chap. 25.4.1.26).
Definition: pruio.h:148
pruIo::BallOrg
uint8 * BallOrg
pointer for original Ball configuration
Definition: pruio.h:422
pwmssSet::QPOSCTL
uint16 QPOSCTL
Position-Compare Control Register (chap. 15.4.3.15).
Definition: pruio.h:252
pwmssSet::CLKSTATUS
uint32 CLKSTATUS
Clock Status Register (chap. 15.1.3.4).
Definition: pruio.h:219
adcSet::DMA1REQ
uint32 DMA1REQ
Register at offset F8h (chap. 12.5.1.56).
Definition: pruio.h:108
pruio.hp
This file synchronizes parameters between FreeBASIC, C and PASM source code.
pwmssSet::TZSEL
uint16 TZSEL
Trip-Zone Select Register.
Definition: pruio.h:272
pwmssSet::DBRED
uint16 DBRED
Dead-Band Generator Rising Edge Delay Count Register.
Definition: pruio.h:272
pruIo::BallConf
uint8 * BallConf
pointer to ball configuration (CPU pin muxing)
Definition: pruio.h:422
pruIo
struct pruIo pruIo
forward declaration
Definition: pruio.h:46
gpioSet::CTRL
uint32 CTRL
Register at offset 130h (chap. 25.4.1.15).
Definition: pruio.h:148
adcSet::IRQWAKEUP
uint32 IRQWAKEUP
Register at offset 34h (chap. 12.5.1.7).
Definition: pruio.h:87
pwmssArr::C2
uint32 C2
period time counter value
Definition: pruio.h:320
pwmssSet::TZFLG
uint16 TZFLG
Trip-Zone Flag Register.
Definition: pruio.h:272
pwmssUdt::InitParA
uint32 InitParA
offset to read data block offset
Definition: pruio.h:341
gpioArr::DATAOUT
uint32 DATAOUT
current Value of DATAOUT register (IO)
Definition: pruio.h:184
pruIo::DInit
void * DInit
pointer to block of devices initial data
Definition: pruio.h:417
PRUIO_ACT_ADC
activate ADC
Definition: pruio.h:377
gpioSet::IRQWAKEN_0
uint32 IRQWAKEN_0
Register at offset 44h (chap. 25.4.1.12).
Definition: pruio.h:148
pruIo
Wrapper structure for PruIo.
Definition: pruio.h:403
pwmssSet::TBCNT
uint16 TBCNT
Time-Base Counter Register.
Definition: pruio.h:272
gpioSet::LEVELDETECT1
uint32 LEVELDETECT1
Register at offset 144h (chap. 25.4.1.20).
Definition: pruio.h:148
PRUIO_AZ_BALL
#define PRUIO_AZ_BALL
The number of CPU balls to handle (minus one).
Definition: pruio.hp:81
pruio_new
pruIo * pruio_new(uint16 Act, uint8 Av, uint32 OpD, uint8 SaD)
Wrapper function for the constructor PruIo::PruIo().
pwmssArr::CMax
uint32 CMax
maximum counter value
Definition: pruio.h:320
gpioSet::DEBOUNCENABLE
uint32 DEBOUNCENABLE
Register at offset 150h (chap. 25.4.1.23).
Definition: pruio.h:148
pruIo::Errr
char * Errr
pointer for error messages
Definition: pruio.h:411
pruio_adc_mm_trg_pre
uint32 pruio_adc_mm_trg_pre(pruIo *Io, uint8 Stp, int32 AdcV, uint16 Samp, uint8 Rela)
Wrapper function for AdcUdt::mm_trg_pre().
pwmssArr
Wrapper structure for PwmssArr.
Definition: pruio.h:316
pwmssSet::QPOSSLAT
uint32 QPOSSLAT
Strobe Position Latch Register (chap. 15.4.3.6).
Definition: pruio.h:242
pwmssSet::QWDTMR
uint16 QWDTMR
Watchdog Timer Register (chap. 15.4.3.10).
Definition: pruio.h:252
pruio_destroy
void pruio_destroy(pruIo *Io)
Wrapper function for the destructor PruIo::~PruIo.
int32
int int32
32 bit signed integer data type
Definition: pruio.h:36
PRUIO_ACT_PWM2
activate PWMSS-2 (including eCAP, eQEP, ePWM)
Definition: pruio.h:384
pwmssSet::QWDPRD
uint16 QWDPRD
Watchdog Period Register (chap. 15.4.3.11).
Definition: pruio.h:252
pruIo::DRam
uint32 * DRam
pointer to access PRU DRam
Definition: pruio.h:412
pwmssSet::CMPA
uint16 CMPA
Counter-Compare A Register.
Definition: pruio.h:272
adcSet::ClAd
uint32 ClAd
clock address
Definition: pruio.h:82
pwmssSet::ETFRC
uint16 ETFRC
Event-Trigger Force Register.
Definition: pruio.h:272
pwmssSet::AQCTLB
uint16 AQCTLB
Action-Qualifier Control Register for Output B (EPWMxB)
Definition: pruio.h:272
PRUIO_ACT_GPIO3
activate GPIO-3
Definition: pruio.h:381
pwmssSet::ECFRC
uint16 ECFRC
Capture Interrupt Force Register (chap. 15.3.4.1.12).
Definition: pruio.h:232
float_t
float float_t
float data type
Definition: pruio.h:40
gpioArr
struct gpioArr gpioArr
Wrapper structure for GpioArr.
pwmssSet::QEPSTS
uint16 QEPSTS
Status Register (chap. 15.4.3.20).
Definition: pruio.h:252
PRUIO_DEF_ACTIVE
activate all devices
Definition: pruio.h:385
pruio_pwm_Value
char * pruio_pwm_Value(pruIo *Io, uint8 Ball, float_t *Hz, float_t *Du)
Wrapper function for PwmMod::Value().
adcUdt::Value
uint16 * Value
fetched ADC samples
Definition: pruio.h:133
gpioSet::RISINGDETECT
uint32 RISINGDETECT
Register at offset 148h (chap. 25.4.1.21).
Definition: pruio.h:148
pwmssSet::QCTMR
uint16 QCTMR
Capture Timer Register (chap. 15.4.3.21).
Definition: pruio.h:252
adcSet::STEPENABLE
uint32 STEPENABLE
Register at offset 54h (chap. 12.5.1.15).
Definition: pruio.h:87
pwmssSet::QPOSINIT
uint32 QPOSINIT
Position Counter Initialization Register (chap. 15.4.3.2).
Definition: pruio.h:242
pwmssUdt::CapMod
const uint16 CapMod
value for ECCTL2 in CAP mode (&b11010110)
Definition: pruio.h:343
gpioUdt
Wrapper structure for GpioUdt.
Definition: pruio.h:194
pwmssSet::IDVER
uint32 IDVER
IP Revision Register (chap. 15.1.3.1).
Definition: pruio.h:219
adcSet::ADC_MISC
uint32 ADC_MISC
Register at offset 50h (chap. 12.5.1.14).
Definition: pruio.h:87
pwmssSet::HRCTL
uint16 HRCTL
HRPWM Control Register.
Definition: pruio.h:272
gpioSet::IRQSTATUS_1
uint32 IRQSTATUS_1
Register at offset 30h (chap. 25.4.1.7).
Definition: pruio.h:148
adcUdt::ChAz
uint16 ChAz
the number of active steps
Definition: pruio.h:130
pwmssSet::AQCSFRC
uint16 AQCSFRC
Action-Qualifier Continuous S/W Force Register Set.
Definition: pruio.h:272
adcUdt::InitParA
uint32 InitParA
offset to read data block offset
Definition: pruio.h:126
pwmssUdt
Wrapper structure for PwmssUdt.
Definition: pruio.h:334
pwmssSet::ECEINT
uint16 ECEINT
Capture Interrupt Enable Register (chap. 15.3.4.1.9).
Definition: pruio.h:232
pwmssSet::QEPCTL
uint16 QEPCTL
Control Register (chap. 15.4.3.14).
Definition: pruio.h:252
adcSet
struct adcSet adcSet
Wrapper structure for AdcSet.
pruIo::DevAct
int16 DevAct
active devices
Definition: pruio.h:433
gpioSet::IRQSTATUS_0
uint32 IRQSTATUS_0
Register at offset 2Ch (chap. 25.4.1.6).
Definition: pruio.h:148
adcUdt::Conf
adcSet * Conf
current device configuration, used in PruIo::config()
Definition: pruio.h:123
pwmMod
struct pwmMod pwmMod
Wrapper structure for PwmMod.
Definition: pruio.h:351
gpioUdt::Init
gpioSet * Init[PRUIO_AZ_GPIO+1]
initial device configuration, used in the destructor PruIo:~PruIo()
Definition: pruio.h:197
pwmssUdt::Top
pruIo * Top
pointer to the calling PruIo instance
Definition: pruio.h:335
gpioUdt::Top
pruIo * Top
pointer to the calling PruIo instance
Definition: pruio.h:195
adcSet::SYSCONFIG
uint32 SYSCONFIG
Register at offset 10h (chap. 12.5.1.2).
Definition: pruio.h:87
pruio_gpio_setValue
char * pruio_gpio_setValue(pruIo *Io, uint8 Ball, uint8 Modus)
Wrapper function for GpioUdt::config().
pwmssSet::ETPS
uint16 ETPS
Event-Trigger Pre-Scale Register.
Definition: pruio.h:272
adcSet::FIFO0THRESHOLD
uint32 FIFO0THRESHOLD
Register at offset E8h (chap. 12.5.1.52).
Definition: pruio.h:108
pruio_gpio_Value
uint32 pruio_gpio_Value(pruIo *Io, uint8 Ball)
Wrapper function for GpioUdt::Value().
adcSteps::Delay
uint32 Delay
context for delay register
Definition: pruio.h:72
pwmssSet::TZEINT
uint16 TZEINT
Trip-Zone Enable Interrupt Register.
Definition: pruio.h:272
pwmssArr::DeAd
uint32 DeAd
device address
Definition: pruio.h:318
pwmssSet::CTRPHS
uint32 CTRPHS
Counter Phase Offset Value Register (chap. 15.3.4.1.2).
Definition: pruio.h:225
adcSet::IRQSTATUS
uint32 IRQSTATUS
Register at offset 28h (chap. 12.5.1.4).
Definition: pruio.h:87
pwmssSet::ECCTL1
uint16 ECCTL1
Capture Control Register 1 (chap. 15.3.4.1.7).
Definition: pruio.h:232
pwmssSet::CAP2
uint32 CAP2
Capture 2 Register (chap. 15.3.4.1.4).
Definition: pruio.h:225
PRUIO_ACT_PWM1
activate PWMSS-1 (including eCAP, eQEP, ePWM)
Definition: pruio.h:383
pwmssSet::QPOSCNT
uint32 QPOSCNT
Position Counter Register (chap. 15.4.3.1).
Definition: pruio.h:242
pruIo::PruNo
uint32 PruNo
the PRU number to use (defaults to 1)
Definition: pruio.h:425
gpioSet::SYSCONFIG
uint32 SYSCONFIG
Register at offset 10h (chap. 25.4.1.2).
Definition: pruio.h:148
adcUdt::TimerVal
uint32 TimerVal
timer value in [ns]
Definition: pruio.h:126
gpioSet::IRQSTATUS_RAW_1
uint32 IRQSTATUS_RAW_1
Register at offset 28h (chap. 25.4.1.5).
Definition: pruio.h:148
pruio_cap_Value
char * pruio_cap_Value(pruIo *Io, uint8 Ball, float_t *Hz, float_t *Du)
Wrapper function for CapMod::Value().
pruio_cap_config
char * pruio_cap_config(pruIo *Io, uint8 Ball, float_t FLow)
Wrapper function for CapMod::config().
pwmssSet::CAP4
uint32 CAP4
Capture 4 Register (chap. 15.3.4.1.6).
Definition: pruio.h:225
gpioSet
Wrapper structure for GpioSet.
Definition: pruio.h:141
gpioArr::Mix
uint32 Mix
current state of pins (IN&OUT mixed)
Definition: pruio.h:184
pwmssSet::ETFLG
uint16 ETFLG
Event-Trigger Flag Register.
Definition: pruio.h:272
pwmssSet::TBPHS
uint16 TBPHS
Time-Base Phase Register.
Definition: pruio.h:272
pwmssSet::TBSTS
uint16 TBSTS
Time-Base Status Register.
Definition: pruio.h:272
gpioSet::DEBOUNCINGTIME
uint32 DEBOUNCINGTIME
Register at offset 154h (chap. 25.4.1.24).
Definition: pruio.h:148
pwmssSet::ClAd
uint32 ClAd
clock address
Definition: pruio.h:214
adcSteps
Wrapper structure for AdcSteps.
Definition: pruio.h:70
pwmssSet::QPOSLAT
uint32 QPOSLAT
Position Counter Latch Register (chap. 15.4.3.7).
Definition: pruio.h:242
adcSet::DMAENABLE_SET
uint32 DMAENABLE_SET
Register at offset 38h (chap. 12.5.1.8).
Definition: pruio.h:87
pwmssSet::CMPCTL
uint16 CMPCTL
Counter-Compare Control Register.
Definition: pruio.h:272
adcSet::IRQENABLE_SET
uint32 IRQENABLE_SET
Register at offset 2Ch (chap. 12.5.1.5).
Definition: pruio.h:87
adcSet::ADCRANGE
uint32 ADCRANGE
Register at offset 48h (chap. 12.5.1.12).
Definition: pruio.h:87
pwmssArr::C1
uint32 C1
on time counter value
Definition: pruio.h:320
ballSet
struct ballSet ballSet
Wrapper structure for BallSet.
pwmssSet::CAP1
uint32 CAP1
Capture 1 Register (chap. 15.3.4.1.3).
Definition: pruio.h:225
pruIo::PruEvtOut
uint32 PruEvtOut
the interrupt channel to send commands to PRU
Definition: pruio.h:425
gpioSet::LEVELDETECT0
uint32 LEVELDETECT0
Register at offset 140h (chap. 25.4.1.19).
Definition: pruio.h:148
adcSet::DMAENABLE_CLR
uint32 DMAENABLE_CLR
Register at offset 3Ch (chap. 12.5.1.9).
Definition: pruio.h:87
pwmssSet::QPOSMAX
uint32 QPOSMAX
Maximum Position Count Register (chap. 15.4.3.3).
Definition: pruio.h:242
adcSet::IRQSTATUS_RAW
uint32 IRQSTATUS_RAW
Register at offset 24h (chap. 12.5.1.3).
Definition: pruio.h:87
pruIo::PruDRam
uint32 PruDRam
the PRU data ram
Definition: pruio.h:425
pwmssSet::ECFLG
uint16 ECFLG
Capture Interrupt Flag Register (chap. 15.3.4.1.10).
Definition: pruio.h:232
pwmssSet::CMPB
uint16 CMPB
Counter-Compare B Register.
Definition: pruio.h:272
adcSteps::Confg
uint32 Confg
context for configuration register
Definition: pruio.h:72
pwmssSet::ETSEL
uint16 ETSEL
Event-Trigger Selection Register.
Definition: pruio.h:272
pwmssSet::TBCTL
uint16 TBCTL
Time-Base Control Register.
Definition: pruio.h:272
pruIo::MOffs
void * MOffs
configuration offset for modules
Definition: pruio.h:417
pruIo::PruIRam
uint32 PruIRam
the PRU instruction ram to load
Definition: pruio.h:425
pwmssSet::TBPHSHR
uint16 TBPHSHR
Extension for HRPWM Phase Register.
Definition: pruio.h:272
pwmssSet::ECCLR
uint16 ECCLR
Capture Interrupt Clear Register (chap. 15.3.4.1.11).
Definition: pruio.h:232
pwmssArr::fe4
uint32 fe4
???
Definition: pruio.h:320
pruIo::Gpio
gpioUdt * Gpio
pointer to GPIO device structure
Definition: pruio.h:405
gpioSet::DATAIN
uint32 DATAIN
Register at offset 138h (chap. 25.4.1.17).
Definition: pruio.h:148
adcSet::IRQENABLE_CLR
uint32 IRQENABLE_CLR
Register at offset 30h (chap. 12.5.1.6).
Definition: pruio.h:87
adcUdt
Wrapper structure for AdcUdt.
Definition: pruio.h:120
capMod
struct capMod capMod
Wrapper structure for CapMod.
Definition: pruio.h:357
int16
short int16
16 bit signed integer data type
Definition: pruio.h:35
gpioSet::DeAd
uint32 DeAd
device address
Definition: pruio.h:143
pwmssSet::QDECCTL
uint16 QDECCTL
Decoder Control Register (chap. 15.4.3.12).
Definition: pruio.h:252
pwmssSet
struct pwmssSet pwmssSet
Wrapper structure for PwmssSet.
adcUdt::Init
adcSet * Init
initial device configuration, used in the destructor PruIo:~PruIo()
Definition: pruio.h:123
pwmssUdt::Conf
pwmssSet * Conf[PRUIO_AZ_PWMSS+1]
current device configuration, used in PruIo::config()
Definition: pruio.h:337
pwmssArr
struct pwmssArr pwmssArr
Wrapper structure for PwmssArr.
PRUIO_AZ_PWMSS
#define PRUIO_AZ_PWMSS
The number of PWM subsystems (minus one).
Definition: pruio.hp:83
pruio_config
char * pruio_config(pruIo *Io, uint32 Samp, uint32 Mask, uint32 Tmr, uint16 Mds)
Wrapper function for PruIo::config().
int8
signed char int8
8 bit signed integer data type
Definition: pruio.h:34
gpioSet::IRQSTATUS_SET_1
uint32 IRQSTATUS_SET_1
Register at offset 38h (chap. 25.4.1.9).
Definition: pruio.h:148
PRUIO_ACT_GPIO1
activate GPIO-1
Definition: pruio.h:379
PRUIO_ACT_GPIO0
activate GPIO-0
Definition: pruio.h:378
pwmssSet::QPOSCMP
uint32 QPOSCMP
Position-Compare Register 2/1 (chap. 15.4.3.4).
Definition: pruio.h:242
PRUIO_AZ_GPIO
#define PRUIO_AZ_GPIO
The number of GPIO subsystems (minus one).
Definition: pruio.hp:82
pwmssSet::QCPRD
uint16 QCPRD
Capture Period Register (chap. 15.4.3.22).
Definition: pruio.h:252
pwmssUdt
struct pwmssUdt pwmssUdt
Wrapper structure for PwmssUdt.
pwmssSet::ClVa
uint32 ClVa
clock value
Definition: pruio.h:214
adcSet::FIFO1COUNT
uint32 FIFO1COUNT
Register at offset F0h (chap. 12.5.1.54).
Definition: pruio.h:108
pruIo::Conf
ballSet * Conf
The devices register data used by libpruio (current local data)
Definition: pruio.h:414
PRUIO_ACT_PWM0
activate PWMSS-0 (including eCAP, eQEP, ePWM)
Definition: pruio.h:382
pwmssSet::DBFED
uint16 DBFED
Dead-Band Generator Falling Edge Delay Count Register.
Definition: pruio.h:272
pwmssUdt::Init
pwmssSet * Init[PRUIO_AZ_PWMSS+1]
initial device configuration, used in the destructor PruIo:~PruIo()
Definition: pruio.h:337