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AM33xx-PRU driver for digital input / output and analog input
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pruio_pins.bi
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1 /'* \file pruio_pins.bi
2 \brief Pre-defined macros to handle the beagle bone header pins.
3 
4 This file contains macros and arrays to easy handle the header pins and
5 pin groups of the beaglebone hardware. Instead of looking up the CPU
6 pin number in lists, you can use a macro named after the header and pin
7 number (ie pin 3 of header P8 is named P8_03).
8 
9 Also included are pre-defined arrays for the pin groups of the
10 beaglebone black hardware. These contain all pins that belong to a
11 device like the EMMC2 or HDMI and can be used ie. to lock or unlock
12 these pins as one group.
13 
14 '/
15 
16 #define P8_03 6 ' emmc2
17 #define P8_04 7 ' emmc2
18 #define P8_05 2 ' emmc2
19 #define P8_06 3 ' emmc2
20 #define P8_07 36
21 #define P8_08 37
22 #define P8_09 39
23 #define P8_10 38
24 #define P8_11 13
25 #define P8_12 12
26 #define P8_13 9
27 #define P8_14 10
28 #define P8_15 15
29 #define P8_16 14
30 #define P8_17 11
31 #define P8_18 35
32 #define P8_19 8
33 #define P8_20 33 ' emmc2
34 #define P8_21 32 ' emmc2
35 #define P8_22 5 ' emmc2
36 #define P8_23 4 ' emmc2
37 #define P8_24 1 ' emmc2
38 #define P8_25 0 ' emmc2
39 #define P8_26 31
40 #define P8_27 56 ' hdmi
41 #define P8_28 58 ' hdmi
42 #define P8_29 57 ' hdmi
43 #define P8_30 59 ' hdmi
44 #define P8_31 54 ' hdmi
45 #define P8_32 55 ' hdmi
46 #define P8_33 53 ' hdmi
47 #define P8_34 51 ' hdmi
48 #define P8_35 52 ' hdmi
49 #define P8_36 50 ' hdmi
50 #define P8_37 48 ' hdmi
51 #define P8_38 49 ' hdmi
52 #define P8_39 46 ' hdmi
53 #define P8_40 47 ' hdmi
54 #define P8_41 44 ' hdmi
55 #define P8_42 45 ' hdmi
56 #define P8_43 42 ' hdmi
57 #define P8_44 43 ' hdmi
58 #define P8_45 40 ' hdmi
59 #define P8_46 41 ' hdmi
60 
61 #define P9_11 28
62 #define P9_12 30
63 #define P9_13 29
64 #define P9_14 18
65 #define P9_15 16
66 #define P9_16 19
67 #define P9_17 87
68 #define P9_18 86
69 #define P9_19 95 ' i2c2
70 #define P9_20 94 ' i2c2
71 #define P9_21 85
72 #define P9_22 84
73 #define P9_23 17
74 #define P9_24 97
75 #define P9_25 107 ' mcasp0
76 #define P9_26 96
77 #define P9_27 105
78 #define P9_28 103 ' mcasp0
79 #define P9_29 101 ' mcasp0
80 #define P9_30 102
81 #define P9_31 100 ' mcasp0
82 #define P9_41 109
83 #define P9_42 89
84 
85 '* CPU ball numbers for all pins on header P8
86 STATIC SHARED AS uint8 P8_Pins(...) = { _
87  6 _
88 , 7 _
89 , 2 _
90 , 3 _
91 , 36 _
92 , 37 _
93 , 39 _
94 , 38 _
95 , 13 _
96 , 12 _
97 , 9 _
98 , 10 _
99 , 15 _
100 , 14 _
101 , 11 _
102 , 35 _
103 , 8 _
104 , 33 _
105 , 32 _
106 , 5 _
107 , 4 _
108 , 1 _
109 , 0 _
110 , 31 _
111 , 56 _
112 , 58 _
113 , 57 _
114 , 59 _
115 , 54 _
116 , 55 _
117 , 53 _
118 , 51 _
119 , 52 _
120 , 50 _
121 , 48 _
122 , 49 _
123 , 46 _
124 , 47 _
125 , 44 _
126 , 45 _
127 , 42 _
128 , 43 _
129 , 40 _
130 , 41 _
131  }
132 
133 '* CPU ball numbers for all digital pins on header P9
134 STATIC SHARED AS uint8 P9_Pins(...) = { _
135  28 _
136 , 30 _
137 , 29 _
138 , 18 _
139 , 16 _
140 , 19 _
141 , 87 _
142 , 86 _
143 , 95 _
144 , 94 _
145 , 85 _
146 , 84 _
147 , 17 _
148 , 97 _
149 , 107 _
150 , 96 _
151 , 105 _
152 , 103 _
153 , 101 _
154 , 102 _
155 , 100 _
156 , 109 _
157 , 89 _
158  }
159 
160 '* CPU ball numbers for emmc2 pin group on header P8 (locked on BBB)
161 STATIC SHARED AS uint8 EMMC2_Pins(...) = { _
162  6 _
163 , 7 _
164 , 2 _
165 , 3 _
166 , 33 _
167 , 32 _
168 , 5 _
169 , 4 _
170 , 1 _
171 , 0 _
172  }
173 
174 '* CPU ball numbers for hdmi pin group on header P8 (locked on BBB)
175 STATIC SHARED AS uint8 HDMI_Pins(...) = { _
176  56 _
177 , 58 _
178 , 57 _
179 , 59 _
180 , 54 _
181 , 55 _
182 , 53 _
183 , 51 _
184 , 52 _
185 , 50 _
186 , 48 _
187 , 49 _
188 , 46 _
189 , 47 _
190 , 44 _
191 , 45 _
192 , 42 _
193 , 43 _
194 , 40 _
195 , 41 _
196  }
197 
198 '* CPU ball numbers for i2c1 pin group on header P9 (locked)
199 STATIC SHARED AS uint8 I2C1_Pins(...) = { _
200  87 _
201 , 86 _
202  }
203 
204 '* CPU ball numbers for i2c2 pin group on header P9 (locked)
205 STATIC SHARED AS uint8 I2C2_Pins(...) = { _
206  95 _
207 , 94 _
208  }
209 
210 '* CPU ball numbers for mcasp0 pin group on header P9 (locked)
211 STATIC SHARED AS uint8 MCASP0_Pins(...) = { _
212  107 _
213 , 103 _
214 , 101 _
215 , 100 _
216  }
217